Samsung Electronics, a world leader in advanced semiconductor technology, today announced the industry's first integrated power management ICs (PMICs) — S2FPD01, S2FPD02 and S2FPC01, for the fifth-generation double data rate (DDR5) dual in-line memory module (DIMM). One major design improvement to the newest generation DRAM solution involves integrating the PMIC into the memory module — previous generations placed the PMIC on the motherboard — offering increased compatibility and signal integrity, and providing a more reliable and sustained performance.
For improved performance efficiency and load-transient responses, Samsung's new PMICs for DDR5 modules have been equipped with a high-efficiency hybrid gate driver and a proprietary control design (asynchronous-based dual-phase buck control scheme). This scheme allows the DC voltage to step down from high to low with a fast transient response to changes in the output load current and adapts the conversion accordingly to efficiently regulate its output voltage at near-constant levels. The control scheme also features both pulse width and pulse frequency modulation methods, preventing delays and malfunctions when switching modes.
Two of Samsung's new DDR5 DIMM PMIC solutions, the S2FPD01 and the S2FPD02, offer optimal performance for today's data center and enterprise servers that must run heavy analytics, machine and deep learning, and other various computing tasks in real time. The FPD01 is designed for modules with low density; FPD02 for higher density.
In addition, by implementing a high-efficiency hybrid gate driver instead of a linear regulator, Samsung's new PMICs can operate at up to 91-percent power efficiency.
The S2FPC01, Samsung's other new PMIC, is tailored for use in desktop or laptop PCs. Designed on a 90-nanometer (nm) process node, the PMIC solution offers a more agile performance in a smaller package.
Samsung's DDR5 DIMM power management ICs, the S2FPD01, S2FPD02 and S2FPC01, are currently being sampled to customers.
View at TechPowerUp Main Site
For improved performance efficiency and load-transient responses, Samsung's new PMICs for DDR5 modules have been equipped with a high-efficiency hybrid gate driver and a proprietary control design (asynchronous-based dual-phase buck control scheme). This scheme allows the DC voltage to step down from high to low with a fast transient response to changes in the output load current and adapts the conversion accordingly to efficiently regulate its output voltage at near-constant levels. The control scheme also features both pulse width and pulse frequency modulation methods, preventing delays and malfunctions when switching modes.
Two of Samsung's new DDR5 DIMM PMIC solutions, the S2FPD01 and the S2FPD02, offer optimal performance for today's data center and enterprise servers that must run heavy analytics, machine and deep learning, and other various computing tasks in real time. The FPD01 is designed for modules with low density; FPD02 for higher density.
In addition, by implementing a high-efficiency hybrid gate driver instead of a linear regulator, Samsung's new PMICs can operate at up to 91-percent power efficiency.
The S2FPC01, Samsung's other new PMIC, is tailored for use in desktop or laptop PCs. Designed on a 90-nanometer (nm) process node, the PMIC solution offers a more agile performance in a smaller package.
Samsung's DDR5 DIMM power management ICs, the S2FPD01, S2FPD02 and S2FPC01, are currently being sampled to customers.
View at TechPowerUp Main Site
