Upcoming Hardware Launches 2024 (Updated Nov 2024)

[Joss]

I don't get the .05 GHz on 2600X/2700X.
Why such a precise number? Is it technically dictated or marketing choice?

 

[windwhirl]

I don't get the .05 GHz on 2600X/2700X.
Why such a precise number? Is it technically dictated or marketing choice?

When your competition's market share is three times as big as your own, every little bit counts??

 

[W1zzard]

Hello, this is my first comment here.
Just a clarification: this article says "PCI-Express 4.0/ specification released in late 2018", but the source (from octobre 2017) says "The Peripheral Component Interconnect (PCI) special interest group (SIG) published the first official specification (version 1.0) of PCI-Express gen 4.0 bus ".

Maybe that "late 2018" is really 2017 and we can expect some retail implementation in late 2018-early 2019?

Fixed, this was a typo. Thanks!

 

[Caelestis]

Any news about first generation of Ryzen CPUs are also compatible with the new 400 Chipset?

 

[W1zzard]

Any news about first generation of Ryzen CPUs are also compatible with the new 400 Chipset?

I don't know anything, but I would assume so

 

[Imsochobo]

When your competition's market share is three times as big as your own, every little bit counts??

Remember when it was 90 times larger ?

 

[Jism]

Hello, this is my first comment here.
Just a clarification: this article says "PCI-Express 4.0/ specification released in late 2018", but the source (from octobre 2017) says "The Peripheral Component Interconnect (PCI) special interest group (SIG) published the first official specification (version 1.0) of PCI-Express gen 4.0 bus ".

Maybe that "late 2018" is really 2017 and we can expect some retail implementation in late 2018-early 2019?

Vendors need to make it work first, chipsets need to be compatible and so on.

 

[CheapMeat]

Also, consider that not many devices will use the full bandwidth of PCIe 4.0 x16, unless under certain scenarios, so for consumers there would be little need of faster PCIe lanes in most cases.

I think this overlooks the true benefit and function 5.0 would be for consumer, enthusiasts and enterprise. It's not about a full slot x16. 4.0 seems to be a stopgap for enterprise because of 40Gbe and up NICs already out and x16 4.0 would be "good enough" for most situations/solutions for a long time, even in Enterprise. But 5.0 is more about what you can do with x1 lane. NVMe is becoming more and more standard. SuperMicro for instance already has a 20 slot (example below), 40+ slot and Intel ruler servers. PLX-style switches are expensive. The goal is to have enough lanes and those lanes having enough bandwidth. You can do that with 5.0. x1 5.0 is about 4000 MB/s. Good x4 NMVe drives can go around 2500MB/s to 3000MB/s. I'm sure this can improve further. So x16, gives you 16 drives with plenty of bandwidth. I think SATA3 will always be on consumer boards but on workstation & enthusiast boards, I see SFF-8643 being more prominent instead. IcyDock for example is already moving to it with it's bay devices.

Tangent but U.2 gets a bad rap of "what's the point" because of the connector on the OTHER end for "U.2" devices. That's the crappy part that people think about.

Image examples:

The ugly U.2 part most think about or associate:

 

[delshay]

DDR5

Having the regulator on the DIMM will restrict overclocking, not unless you can adjust it voltage output. Much prefer it on the motherboard away from the dram chips, but it should lead to a much cleaner looking motherboard.

 

[CheapMeat]

Actually I think overclocking, stability and support is going to be significantly better with the VR on the DIMM. DDR5 is bring a whole bunch of other big changes. It's a much more significant difference than DDR3 to DDR4.

 

[W1zzard]

Cleanup of launched products: Zen+, Intel Q1 Coffee Lake models and AMD 400 Series chipsets
Added AMD Z470 chipset info.
Added Intel Z390 and X399 chipsets.
Added Intel Core i7-8086K, Cannon Lake and Ice Lake.

 

[ryun]

Introduction says "Added AMD Z470" but I think this should say Z490.

I love this list by the way. Thanks for keeping it updated.

 

[W1zzard]

Introduction says "Added AMD Z470" but I think this should say Z490.

I love this list by the way. Thanks for keeping it updated.

Fixed. Thanks! Too many chipsets out there

 

[FordGT90Concept]

View attachment 98547

That is MiniSAS (SFF-8643). It only supports SAS/SATA break out. The red text on this picture is wrong.

The ugly U.2 part most think about or associate:
View attachment 98548

That is U.2 (SFF-8639). It supports SAS, SATA, or NVMe.

 

[CheapMeat]

SFF-8643 supports NVMe, 4 pcie lanes if connected to another MiniSAS port. The SFF-8639 is sub-par and probably going to die out. I was just pointing out how SFF-8643 is hugely more versatile than thought of by most. But at the the consumer level "U.2", thus the SFF-8643 is associated with that SFF-8639 port. I'm saying that association is terrible. You can do much more with the SFF-8643 port. Even IcyDock is coming out with NVMe bays using SFF-8643. The marketing on boards should nix the SFF-8639 association. And show off the advantage of SFF-8643 in all forms.

 

[FordGT90Concept]

Did some more digging on this:
http://www.nvmexpress.org/wp-content/uploads/NVMe_Infrastructure_final1.pdf

SATA supports PCIe x2 lanes. MiniSAS is basically two SATA ports so it has access to PCIe x4 lanes. Did not know this.

U.2 is the standard for the internal drive connector. ToughArmor MB699VP-B has 4 x U.2 inside and a dedicated miniSAS for each drive externally.

MiniSAS itself has had three pins added (rather, repurposed) for supporting NVMe: SMBUS, PCIe Reset, Reference Clock). When buying miniSAS cables for NVMe use, they must be NVMe rated.

TL;DR: U.2 is still being used for drives and miniSAS is being used to connect drives.

 

[Moofachuka]

How can Turing be between Pascal and Turing?

 

[W1zzard]

How can Turing be between Pascal and Turing?

Meant to write "Ampere". Fixed. Thanks!

 

[HammerON]

Thanks for continuing to do this W1zzard
I find it real helpful!!!

 

[XiGMAKiD]

I'm curious about Navi, waiting for Nvidia's Turing and Ampere (the one that's closer to $250) review, and also interested in seeing Intel's latest effort in discrete GPU.

Not that interested in die shrinked Vega

 

[las]

This arcticle/thread is a good idea. Fast overview.

Keep it updated please !

 

[Atomic77]

2018 just is getting started we are now in the 5th month.

 

[WikiFM]

I think that nobody here knows about this, in Anandtech I just read a very interesting article that should change the Intel roadmap posted here.
In resume there will be a 4th iteration of Skylake in 14nm called Whiskey Lake that will be launched this year together with Cascade Lake (for servers/enthusiast, also in 14nm), and Cannon Lake will be sent to 2019, Ice Lake to 2020.
Source: https://www.anandtech.com/show/12693/intel-delays-mass-production-of-10-nm-cpus-to-2019

What really amazes me is that Intel keeps delaying a new architecture (Ice Lake) instead of launching it in 14nm, and because of this there will be a 5 year gap (at least) between Skylake and Ice Lake, what in hell are they thinking, by the time they launch Ice Lake it will fight against Zen 2+ or Zen 3.

 

[Joss]

what in hell are they thinking, by the time they launch Ice Lake it will fight against Zen 2+ or Zen 3

Maybe AMD did catch them with the pants down.

 

[W1zzard]

• Updated AMD Zen 2, Zen+ second wave, Threadripper 2nd Gen
• Added GDDR6 info for NVIDIA
• Added AMD B450 chipset
• Added QLC NAND flash
• Added NVIDIA GTX 1050 3 GB
• Updated NVIDIA Turing
• Updated Intel Cannon Lake
• Updated Intel Z390
• Updated DDR5