Intel's next major CPU microarchitecture being designed for the 10 nm silicon fabrication process, codenamed "Ice Lake," could introduce the first major core redesign in over three years. Keen observers of Geekbench database submissions of dual-core "Ice Lake" processor engineering samples noticed something curious - Intel has increased its L1 and L2 cache sizes from previous generations.

The L1 data cache has been enlarged to 48 KB from 32 KB of current-generation "Coffee Lake," and more interestingly, the L2 cache has been doubled in size to 512 KB, from 256 KB. The L1 instruction cache is still 32 KB in size, while the shared L3 cache for this dual-core chip is 4 MB. The "Ice Lake" chip in question is still a "mainstream" rendition of the microarchitecture, and not an enterprise version, which has had a "re-balanced" cache hierarchy since "Skylake-X," which combined large 1 MB L2 caches with relatively smaller shared L3 caches.

Intel processor integrated graphics will get its first major hardware update in 4 years since Gen 9.5 "Skylake," with the introduction of the Gen11 architecture that debuts with the company's "Ice lake" processors. The company confirmed in an XDC 2018 conference presentation that the iGPU will support DisplayPort 1.4a along with VESA DSC (display stream compression), enabling it to support display resolutions as high as 5K (5120 x 2880 pixels) with 120 Hz refresh-rate.

Without DSC, 5K-120 Hz requires 42.4 Gbps of bandwidth (not counting interconnect and protocol overheads), which even DisplayPort with HBR3 cannot provide, as it caps out at 32.4 Gbps. DSC offers "visually lossless" compression of the 5K-120 display stream down to roughly 14 Gbps, which can be comfortably handled by DisplayPort 1.4a. 8K (8192 x 4320 pixels) at 60 Hz also becomes possible. Merely supporting these new high resolutions doesn't imply Gen11 iGPUs can game at those resolutions. Support for them is necessitated by rapid increases in resolutions (pixel densities) and refresh-rates of high-end notebooks and ultra-portable devices.The complete slide-deck follows.

With no end to its 10 nm transition woes in sight (at least not until late-2019), Intel is left with refinement of its existing CPU micro-architectures on the 14 nanometer node. The client-desktop segment sees the introduction of the "Whiskey Lake" (aka Coffee Lake Refresh) later this year; while the enterprise segment gets the 14 nm "Cascade Lake." To its credit, Cascade Lake introduces a few major platform innovations, such as support for Optane Persistent Memory, silicon-level hardening against recent security vulnerabilities, and Deep Learning Boost, which is hardware-accelerated neural net building/training, and the introduction of VNNI (Variable Length Neural Network Instructions). "Cascade Lake" makes its debut towards the end of 2018. It will be succeeded in 2019 by Ice Lake the new "Cooper Lake" architecture.

"Cooper Lake" is a refresh of "Cascade Lake," and a stopgap in Intel's saga of getting 10 nm right, so it could build "Ice Lake" on it. It will be built on the final (hopefully) iteration of the 14 nm node. It will share its platform with "Cascade Lake," and so Optane Persistent Memory support carriers over. What's changed is the Deep Learning Boost feature-set, which will be augmented with a few new instructions, including BFLOAT16 (a possible half-precision floating point instruction). Intel could also be presented with the opportunity to crank up clock speeds across the board.

Intel, via its internal documentation that is, routinely, the source of new information on unreleased products, has revealed their next low-power architecture. Codenamed Tremont, the new architecture is expected to be developed on the company's 10 nm process (not unlike Ice Lake) and bring some performance improvements to the company's options for the embedded market.

Tremont will thus replace Intel's Goldmont Plus, which is still being manufactured on the company's 14 nm process (it hasn't been side-graded to the company's 14 nm + or ++ processes, due to these being less suited for denser chip designs). The new architecture will likely receive some specific performance improvements that mirror some of Intel's Core architecture's improvements, alongside support for new instruction sets - CLWB, GFNI (SSE-based), ENCLV, Split Lock Detection instruction set extensions are all extensions that will also be introduced in the company's Ice Lake cores, which increases the likelihood of the same process. Other functions introduced specifically for Tremont include CLDEMOTE, direct store, and user wait instructions.

BTO notebooks and portable workstation maker Eurocom is rather liberal at sharing confidential information on support forums. It was one of the first sources that foretold Intel developing the Z390 Express chipset, and that Intel is preparing to increase CPU core-counts on its MSDT (mainstream desktop) platform once again, in 2019.

Apparently, the 300-series chipset, led by the Z390 Express, will support Intel's 9th generation, 10 nanometer "Ice Lake" silicon with 8 physical cores. The generational successor to the i7-8700K will hence be an 8-core/16-thread chip. This also presents Intel with an opportunity to make its next Core i5 parts either 8-core/8-thread or 6-core/12-thread, and Core i3 either 6-core/6-thread or 4-core/8-thread.

The Power Stamp Alliance (PSA) has posted some details on Intel's upcoming high-performance, 10 nm architecture. Code-named Ice Lake, the Xeon parts of this design will apparently usher in yet another new socket (socket LGA 4189, compared to the socket LGA 3647 solution for Kaby lake and upcoming Cascade Lake designs). TDP is being shown as increased with Intel's Ice Lake designs, with an "up to" 230 W TDp - more than the Skylake or Cascade Lake-based platforms, which just screams at higher core counts (and other features such as OmniPath or on-package FPGAs).

Digging a little deeper into the documentation released by the PSA shows Intel's Ice Lake natively supporting 8-channel memory as well, which makes sense, considering the growing needs in both available memory capacity, and actual throughput, that just keeps rising. More than an interesting, unexpected development, it's a sign of the times.

big.LITTLE is an innovation by ARM, which seeks to minimize power-draw on mobile devices. It is a sort of heterogeneous multi-core CPU design, in which a few "big" high-performance CPU cores work alongside a few extremely low-power "little" CPU cores. The idea here is that the low-power cores consume much lesser power at max load, than the high-performance cores at their minimum power-state, so the high-performance cores can be power-gated when the system doesn't need them (i.e. most of the time).

Intel finds itself with two distinct x86 implementations at any given time. It has low-power CPU micro-architectures such as "Silvermont," "Goldmont," and "Goldmont Plus," etc., implemented on low-power product lines such as the Pentium Silver series; and it has high-performance micro-architectures, such as "Haswell," "Skylake," and "Coffee Lake." The company wants to take a swing at its own heterogeneous multi-core CPU, according to tech stock analyst Ashraf Eassa, with the Motley Fool.

Intel's next generation "Ice Lake" processor could integrate a significantly faster integrated graphics solution (iGPU), if a SiSoft SANDRA online database entry is to be believed. A prototype "Ice Lake" chip was benchmarked, with its iGPU being described by the database as "Intel UHD Graphics" based on the company's Gen 11 graphics architecture, which succeeds the current Gen 9.5 architecture implemented on "Coffee Lake" and "Kaby Lake." This iGPU is endowed with 48 execution units (EUs), which work out to 384 unified shaders; against 24 EUs and 192 shaders on Intel UHD 620. SANDRA also describes the iGPU as being able to share up to 6 GB of memory from the system memory; and featuring 768 KB of dedicated cache. Its reference clock is 600 MHz, double that of the UHD 620, although its boost clock remains a mystery. "Ice Lake" is being built on Intel's new 10 nm+ silicon fabrication process, so it's understandable for the company to significantly enlarge its iGPU.

PC diagnostics tool HW Info has added support for future, as-of-yet unreleased AMD CPUs and GPUs, which seemingly confirm some earlier news on AMD's plans for their next-generation offerings. HWiNFO's v5.72 update adds support for upcoming AMD Navi GPUs, Pinnacle Ridge, 400-series motherboards (which should make their market debut alongside AMD's Zen+ CPUs), and enhanced support for AMD's Starship, Matisse and Radeon RX Vega M. We already touched upon AMD's Matisse codename in the past: it's expected to refer to the company's Zen 2 microarchitecture, which will bring architecture overhauls of the base Zen design - alongside a 7 nm process - in order to bring enhanced performance and better power consumption.

Starship, on the other hand, is a previously leaked evolution of AMD's current Naples offering that powers their EPYC server CPUs. Starship has been rumored to have been canceled, and then put back on the product schedule again; if anything, its inclusion in HWiNFO's latest version does point towards it having made the final cut, after all. Starship will bring to businesses an increased number of cores and threads (48/96) compared to Naples' current top-tier offering (32/64), alongside a 7 nm manufacturing process.

HWiNFO v. 5.7 has brought with it a smattering of improvements and additions, as is usually the case. These are worthier of a news piece than most, however, since we're looking at quite a number of interesting developments. For one, preliminary support has been added for Intel's Whiskey Lake, an upcoming mobile design that succeed's Intel's Kaby Lake products, and should bring the fight to AMD's Ryzen Mobile offerings. Furthermore, and still on the Intel camp, support for the upcoming 10 nm Ice Lake has also been added. Íf you'll remember, Ice Lake is expected to be Intel's first foray into the 10 nm+ process in the mobile camp (given away by the U/Y product codes), after numerous delays that made the company stick with its 14 nm process through three iterations and in-process improvements. These are not the only Intel developments, however; the team behind HWiNFO has also added a new feature that reveals your Intel CPU's Turbo Boost multipliers, which the company has since removed form their ARK pages and processor specifications - an issue that generated rivers of ink.

Stepping away from the blue giant's camp, there's added support for AMD's next revision of their Ryzen processors (Pinnacle Ridge, on a 12 nm process). There's also mention of upcoming support for AMD's 400-series chipsets, which should improve platform features of the AM4 socket. This addition comes after we've seen its first appearance in the PCI-SIG Integrators List.

Intel revealed the very first hint at its post-"Ice Lake"/"Tiger Lake" processor lineup, which will likely be built on the company's 7 nanometer silicon fab process. Its 12th generation Core processor will be built on the new "Sapphire Rapids" silicon, which will be a major micro-architecture change, and could put 8-core into more hands. The processor, along with its companion chipset, will make up the "Tinsley" platform, which is expected to hit the market in 2020.

Following its 8th generation Core "Coffee Lake" lineup, Intel could built 2-3 micro-architectures on its new 10 nm process, namely "Cannon Lake," "Ice Lake," and "Tiger Lake," which could be released over the next three years. "Sapphire Rapids" could be launched on the process that succeeds 10 nm, likely 7 nm, with a launch timeline likely around 2020.

Intel is reportedly delaying the roll-out of its first processors built on its 10 nanometer silicon fabrication process, codenamed "Cannon Lake" for the third time since its inception. The first products based on the silicon will now come out only by late-2018. In the meantime, Intel could continue to ride on its new 8th generation Core "Coffee Lake" processors, including the augmentation of an 8-core mainstream desktop (MSDT) part in the second-half of 2018.

Notebook manufacturers are less than enthusiastic about "Cannon Lake," and plan to skip it altogether for its successor, codenamed "Ice Lake," which could come out in 2019. It won't be the first time OEMs have done this, as Intel's 5th generation Core "Broadwell" architecture was mostly skipped over in the notebook and MSDT segments.

Having hit a wall with fab process-assisted micro-architecture advancements, and facing an unexpectedly competitive AMD, there's only one direction left for Intel's product development over generations, core-counts. The company is on the verge of introducing 6-core/12-thread "Coffee Lake" processors to the mainstream-desktop (MSDT) platform in a few weeks from now; and if leaks by a popular BTO desktop-replacement/mobile-workstation manufacturer Eurocom is to be believed, the company could increase the core counts a second time in 2018, by introducing an 8-core/16-thread MSDT part.

A Eurocom representative, posting on NotebookReview forums, hinted at the possibility that the upcoming Intel Z390 Express chipset, which hits motherboards in 2018, could exclusively support 8-core/16-thread processors, which come out in the second half of 2018. The representative revealed this in context of the company skipping the Z370 Express chipset, as it lacks support for those upcoming 8-core/16-thread chips. In addition to support for new processors and possibly next-generation "Ice Lake" processors, the Z390 chipset adds several new features over the Z370, including a better onboard audio solution, integrated WLAN, and SDIO controller.

A pretty underwhelming post on Intel's official page has pulled the curtains of the company's architecture name post their 8th generation processors. Actually, it's a little more puzzling than that, since Intel is actually detailing the codename of an architecture that's supposed to come right after their 8th generation - read, Coffee Lake - processors. Keep in mind that Coffee Lake, whilst being supposed to bring a reorganization of Intel's product stack in response to AMD's Ryzen success, will still be in the 14 nm++ process - the third such architecture in the same process, after Skylake (14 nm) and Kaby Lake (14 nm+) before it. Cannon Lake, however, is supposed to be the company's first tick into the 10 nm process.

Intel has moved over from their famed tick-tock (where tick is a process shrink and tock is a new architecture on the same process) cadence, and are now telling customers to expect at least three "tocks" per process. It's expected that Intel will launch mobile processors on the 10 nm process before any desktop parts are launched on the same process; this could stem from the fact that mobile parts are typically lower-power, smaller-sized dies, which are easier and cheaper to produce out of a still maturing 10 nm process, which usually implies lower than ideal yields.

Intel announced that its first CPU micro-architecture built on its upcoming 10 nanometer silicon fab process, the 9th generation Core "Cannon Lake," is on track. In a tweet on the official company account, Intel also announced that its second micro-architecture on the new 10 nm process, codenamed "Ice Lake," is taped out.

In the wake of a competitive CPU lineup by AMD, Intel is frantically upgrading its product lineup, beginning with the new "Basin Falls" HEDT platform early-Summer 2017, followed by its 14 nm "Coffee Lake" 8th generation Core series late-Summer. "Coffee Lake" sees the first six-core SKUs to Intel's mainstream desktop lineup, which has until now, been restricted to dual-core and quad-core parts.

Intel's silicon fabrication has evidently hit a huge roadblock. It turns out that not just "Kaby Lake," but its two successors "Cannon Lake" and "Coffee Lake" could also be built on the 14 nm node, at best with a few process-level improvements. "Coffee Lake" is the company's 9th generation Core architecture, which is two steps ahead of even the "Kaby Lake" architecture, which is due later this year. "Kaby Lake" makes its way to the 45W mobile (H-segment) and 15W mobile (U-segment), in Q4-2016 and Q3-2016, respectively. The 15W U-segment will be augmented by "Cannon Lake" (8th generation Core) in Q4-2017. By mid-2018, Intel plans to launch "Coffee Lake" across both H- and U-segments.

According to a "Hot Hardware" report, based on a job listing for a systems engineer at the company, Intel could be staring at the scary prospect of holding out on 14 nm for the next three years, only to be relieved by the stopgap 10 nm node, which makes its debut with the 10th generation Core "Tiger Lake" architecture, due for 2019. "Tiger Lake," its succeeding "Ice Lake," and one other architecture could be launched on 10 nm, before finally deploying 7 nm around 2022.

With Intel's "tick-tock" product development cycle slowing down to a 3-launch cadence per silicon fab process, the company is preparing to launch no less than three micro-architectures on its next 10 nanometer silicon fab process. The first 10 nm CPU by Intel will launch in 2017.

In 2016, Intel will launch its 7th generation Core "Kaby Lake" processor, its third chip on the 14 nm process (after "Broadwell" and "Skylake"). The first 10 nm micro-architecture will be codenamed "Cannonlake," and will launch some time in 2017. Intel will build chips on the 10 nm for two more generations after "Cannonlake." The company's 2018 micro-architecture, built on the 10 nm will be codenamed "Icelake," and its 2019 release will be codenamed "Tigerlake." It's only 2020 that the company will pull out its next silicon fab process, 5 nm.