Intel LGA1851 Platform

The new LGA1851 socket retains cooler compatibility with LGA1700. The processor packages have identical dimensions and Z-Height to help with this compatibility, too, but you cannot use an LGA1700 processor on an LGA1851 socket. Among other things, the additional pins are for the four extra PCIe Gen 5 lanes the processor puts out, for a CPU-attached Gen 5 NVMe SSD that doesn't eat into the PEG x16.


There are two kinds of ILM (independent loading modules) for the socket, some of the premium motherboard models include the new reduced load ILMs (RL-ILMs), which works to reduce mounting pressure on the package, letting you mount heavier coolers, such as LN2 evaporators. RL-ILMs are clearly marked on the metal brace. Another telltale is the presence of a white insulator pad under the ILM, nearing the mounting screws.


With the Core Ultra 2-series "Arrow Lake-S," Intel is debuting a new socket, LGA1851. You will hence require a new motherboard to go with your shiny new processor, and since all processor models Intel is launching this year are unlocked K or KF SKUs, the only motherboard chipset model available will be the top-spec Intel Z890. Intel will flesh out its processor model stack in 2025, and with it, launch more affordable motherboard chipsets.

The "Arrow Lake-S" SoC puts out a dual-channel DDR5 memory interface, which we described in the previous pages. It also features a massive 48 platform PCIe lanes (CPU + chipset). Intel has increased the number of PCIe Gen 5 lanes put out by the CPU to 20—that's 16 lanes meant for the PEG (x16 slot for graphics cards), and one CPU-attached M.2 NVMe slot that runs at Gen 5 speeds without eating into the 16 PEG lanes. The CPU puts out a second set of Gen 4 x4, which can be wired out as an M.2 slot, or be used to drive high-bandwidth onboard devices, such as a discrete Thunderbolt 5 controller. The processor itself fully integrates a Thunderbolt 4 controller, which puts out a couple of 40 Gbps ports.

The processor connects to the Z890 chipset over a DMI 4.0 x8 chipset bus (bandwidth comparable to PCI-Express 4.0 x8). It puts out 24 PCI-Express Gen 4 downstream lanes. This is a massive increase from the Z790 chipset, which put out 16 Gen 4 and 8 Gen 3 lanes. The integrated USB complex consists of 32 USB 3.2 5 Gbps serial-deserializers, which can be configured by motherboard designers into five 20 Gbps ports, ten 10 Gbps ports, and ten 5 Gbps ports. There's also a 14-port USB 2.0 hub. Intel has retired the HDA "Azalia" audio interface with Z890, which means onboard audio CODECs will have to use the newer MIPI SoundWire and USB 3.2 interfaces (which CODECs like the Realtek ALC4080 and ALC4082 already do).


The chipset integrates a 1 GbE MAC, and Wi-Fi 6. With the PCIe and USB 3.2 connectivity on offer, motherboard vendors can go bonkers with network connectivity, by giving their platforms Wi-Fi 7 and 2.5 GbE, or even 5 GbE and 10 GbE. Vendors can opt for Intel's Killer networking package, which combines existing Intel networking PHY with the advanced Killer prioritization engine, and DoubleShot Pro, which work together to reduce network latency when gaming. Intel has revamped the security architecture for its client processors with "Arrow Lake," giving them three separate hardware security engines, including a purpose-built Converged Security and Manageability Engine (basically the Intel ME but with added security roles), the Silicon Security Engine, which is microarchitecture-level hardening for the new Lion Cove and Skymont CPU cores, a new dedicated security controller for the iGPU, and compliance with Microsoft Secured Core.

Overclocking

The governing idea behind Arrow Lake is to offer generational performance gains along expected lines, but with a leap in energy efficiency from the new tile-based disaggregation, and switch to the new 3 nm foundry node for key logic components of the chip. Conversely, this means that the high efficiency opens up some overclocking headroom. Arrow Lake introduces a dual base-clock domain architecture. There are now two independent BCLK domains, one for the Compute tile, and the other for the SoC tile. This is crucial in ensuring that BCLK-based overclocking doesn't destabilize other clock domains such as PCIe clock, which will stick to the BCLK domain of the SoC tile.

Next up, Intel added a granularity of 16.67 MHz for the clock speeds of the P-cores and E-cores, letting you fine-tune your overclock that much better. The tile-to-tile fabric has a clock domain of its own, which can either be overclocked with a static frequency setting, or in a ratio with CPU clock speeds. DLVR (digital linear voltage regulator) bypass lets certain premium motherboards override the internal voltage management of the processor with smart discrete voltage regulation controllers for superior OC. Arrow Lake supports V/f curve control on a per P-core and per E-core cluster basis. The processor's SMU can detect low-temperature cooling solutions in an overclocked scenario, and bypass voltage limits as the chip gets cooler. Lastly, "Arrow Lake" offers native support for CUDIMMs and CSODIMMs. These are DDR5 memory modules with CKD (client clock drivers), which clean up signal integrity, improving the memory signal eyes and allowing for higher frequencies. Some of the newer memory kits with over 8000 MT/s XMP tend to be CUDIMMs. The revamped power management, switch to the newer TSMC 3 nm node (where it matters), and other optimizations mean that besides lower power, the average package temperature of the 285K is around 13°C lower than that of the i9-14900K. In lightly threaded use-cases, Intel claims an up to 58% lower package power than the i9-14900K.