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AMD Scarlett

Default
Scarlett
Die Shot
Die Shot
CGI Die Shot
CGI Die Shot
Block Diagram
Block Diagram
CU Diagram
CU Diagram
AMD's Scarlett GPU uses the RDNA 2.0 architecture and is made using a 7 nm production process at TSMC. With a die size of 360 mm² and a transistor count of 15,300 million it is a large chip. Scarlett supports DirectX 12 Ultimate (Feature Level 12_2). For GPU compute applications, OpenCL version 1.2 can be used. Additionally, the DirectX 12 Ultimate capability guarantees support for hardware-raytracing, variable-rate shading and more, in upcoming video games. It features 3584 shading units, 224 texture mapping units and 64 ROPs.
Further reading: RDNA Whitepaper

Graphics Processor

Released
Nov 10th, 2020
GPU Name
Scarlett
Codename
Arden
Generation
Navi II
Architecture
RDNA 2.0
Foundry
TSMC
Process Size
7 nm
Transistors
15,300 million
Density
42.5M / mm²
Die Size
360 mm²
Package
BGA-2693
Package Size
52.5mm x 52.5mm

Graphics Features

DirectX
12 Ultimate (12_2)
OpenGL
4.6
OpenCL
1.2
Vulkan
1.2
Shader Model
6.7
WDDM
3.1
GC
10.2.0
Shader ISA
GFX10.2 (gfx1020)
DCN
3.1
VCN
2.4

Render Config

Shading Units
3584
TMUs
224
ROPs
64
Compute Units
56
L2 Cache
5120 KB
Max. TDP
200 W

All RDNA 2.0 GPUs

AMD GPU Architecture History

Graphics cards using the AMD Scarlett GPU

Name Chip Memory Shaders TMUs ROPs GPU Clock Memory Clock
10 GB 3328 208 64 1825 MHz 1750 MHz

Scarlett GPU Notes

Generation: Navi II
Codename: Arden
Ray Tracing Cores: 1st Gen
Graphics/Compute: 10.2.0
Shader ISA: GFX10.2 (gfx1020)
Display Core Next: 3.1
Video Core Next: 2.4
May 20th, 2024 16:20 EDT change timezone

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