AMD's next-generation Ryzen 9000 "Strix Point" mobile processor, which succeeds the current Ryzen 8040 "Hawk Point" and Ryzen 7040 "Phoenix," is confirmed to feature a CPU core-configuration of 12-core/24-thread, according to a specs-leak by HKEPC citing sources among notebook OEMs. It appears like Computex 2024 will be big for AMD, with the company preparing next-gen processor announcements across the desktop and notebook lines. Both the "Strix Point" mobile processor and "Granite Ridge" desktop processor debut the company's next "Zen 5" microarchitecture.

Perhaps the biggest takeaway from "Zen 5" is that AMD has increased the number of CPU cores per CCX from 8 in "Zen 3" and "Zen 4," to 12 in "Zen 5." While this doesn't affect the core-counts of its CCD chiplets (which are still expected to be 8-core), the "Strix Point" processor appears to use one giant CCX with 12 cores. Each of the "Zen 5" cores has a 1 MB dedicated L2 cache, while the 12 cores share a 24 MB L3 cache. The 12-core/24-thread CPU, besides the generational IPC gains introduced by "Zen 5," marks a 50% increase in CPU muscle over "Hawk Point." It's not just the CPU complex, even the iGPU sees a hardware update.

Intel at its VISION conference, confirmed that its next-generation processor for the ultraportable and thin-and-light segments, the Core Ultra "Lunar Lake," will feature an over four-fold increase in NPU performance, which will be as fast as 45 TOPS. This is a significant figure, as Microsoft recently announcedthat Copilot will perform several tasks locally (on the device), provided it has an NPU capable of at least 40 TOPS. The current AI Boost NPU found in Core Ultra "Meteor Lake" processor is no faster than 10 TOPS, and the current AMD Ryzen 8040 series features a Ryzen AI NPU with 16 TOPS on tap. AMD's upcoming Ryzen "Strix Point" processor is rumored to feature a similar 40 TOPS-class NPU performance as "Lunar Lake."

Intel also confirmed that notebooks powered by Core Ultra "Lunar Lake" processors will hit the shelves by Christmas 2024 (December). These notebooks will feature not just the 45 TOPS NPU, but also debut Intel's Arc Xe2 "Battlemage" graphics architecture as the processor's integrated graphics solution. With Microsoft's serious push for standardizing AI assistants, the new crop of notebooks could also feature Copilot as a fixed-function button on their keyboards, similar to the Win key that brings up the Start menu.

Two of AMD's upcoming mobile processors that implement the "Zen 5" microarchitecture, "Strix Point" and "Fire Range," were spotted in shipping manifests. These are prototypes moving between AMD and its OEM partners. The manifest explicitly mentions a "Fire Range" 16-core processor sample with 55 W TDP, another "Fire Range" chip with an 8-core configuration and the same 55 W power; and a trio of "Strix Point" processors with a 28 W power design. Two of these are Ryzen 9 SKUs, and one of them is a Ryzen 7.

VideoCardz has the OPN codes for the samples being moved. The Ryzen 7 "Strix Point" sample bears 100-0000001335. One of the two Ryzen 9 "Strix Point" chips bears 100-000000994. The 16-core "Fire Range" is marked 100-000001028, while the 8-core "Fire Range" is 100-000001029. "Strix Point" will be AMD's most imporant mobile processor silicon, as this will be the one with a "Zen 5" CPU core count relevant to the notebook market, pack an RDNA 3+ iGPU, and that alleged 40 TOPS+ XDNA 2 NPU that can run Microsoft Copilot locally. A step up from this will be "Strix Halo," with a higher CPU core count, a much larger iGPU designed for performance-segment gaming. "Fire Range" is essentially a low Z-height BGA version of the "Granite Ridge" chiplet processor that has up to two "Zen 5" CCDs and an I/O die.

Microsoft, Intel, and AMD are attempting to jumpstart demand in the PC industry again, under the aegis of the AI PC—devices with native acceleration for AI workloads. Both Intel and AMD have mobile processors with on-silicon NPUs (neural processing units), which are designed to accelerate the first wave of AI-enhanced client experiences on Windows 11 23H2. Microsoft's bulwark with democratizing AI has been Copilot, as a licensee of Open AI GPT-4, GPT-4 Turbo, Dali, and other generative AI tools from the Open AI stable. Copilot is currently Microsoft's most heavily invested application, with its most capital and best minds mobilized to making it the most popular AI assistant. Microsoft even pushed for the AI PC designator to PC OEMs, which requires them to have a dedicated Copilot key akin to the Start key (we'll see how anti-competition regulators deal with that).

The problem with Microsoft's tango with Intel and AMD to push AI PCs, is that Copilot doesn't really use an NPU, not even at the edge—you input a query or a prompt, and Copilot hands it over to a cloud-based AI service. This is about to change, with Microsoft announcing that Copilot will be able to run locally on AI PCs. Microsoft identified several kinds of Copilot use-cases that an NPU can handle on-device, which should speed up response times to Copilot queries, but this requires the NPU to have at least 40 TOPS of performance. This is a problem for the current crop of processors with NPUs. Intel's Core Ultra "Meteor Lake" has an AI Boost NPU with 10 TOPS on tap, while the Ryzen 8040 "Hawk Point" is only slightly faster, with a 16 TOPS Ryzen AI NPU. AMD has already revealed that the XDNA 2-based 2nd Generation Ryzen AI NPU in its upcoming "Strix Point" processors will come with over 40 TOPS of performance, and it stands to reason that the NPUs in Intel's "Arrow Lake" or "Lunar Lake" processors are comparable in performance; which should enable on-device Copilot.

Dr. Lisa Su introduced AMD's "next-gen AMD Ryzen" processor series during a recent presentation at the Beijing AI PC Innovation Summit—this announcement confirms that Team Red's RDNA 3+ (AKA 3.5) graphics technology is destined to arrive (on board) with the launch of "Strix Point" processors. Product roadmaps remain unchanged—when compared to slides from last December—AMD still anticipates a 2024 launch window. China has been introduced to current-gen "Hawk Point" Ryzen 8040 mobile and 8000G (AM5) desktop processors—key AMD personnel presented a variety of products, including region-specific budget options.

David Wang, SVP of GPU Technology and Engineering R&D, covered the RDNA 3+ and XDNA 2 architectures (very briefly) during his on-stage appearance—he dedicated most of his attention to current-gen "Hawk Point" processors. The Strix Point integrated solution—a GFX1150 target—has been linked to "RDNA 3.5" for a while, a lot of this information was gleaned from publicly visible AMD patch notices. The latest Team Red software engineering activities indicate that Zen 5 CPU enablement is nearing a possible finish line.

Close monitoring of AMD engineering activities—around mid-February time—revealed the existence of a new set of patches for GNU Compiler Collection (GCC). At the time, news reports put spotlights on Team Red's "znver5" enablement—this target indicated that staffers were prepping Zen 5 processor microarchitecture with an expanded AVX instruction set (building on top of Zen 4's current capabilities). Phoronix's Michael Larabel has fretted over AMD's relative silence over the past month—regarding a possible merging of support prior to the stable release of GCC 14.

He was relieved to discover renewed activity earlier today: "AMD Zen 5 processor enablement has been merged to GCC Git in time for the GCC 14.1 stable release that will be out in the coming weeks. It was great seeing AMD getting their Zen 5 processor enablement upstreamed ahead of any Ryzen or EPYC product launches and being able to do so in time for the annual major GNU Compiler Collection feature release." Team Red is inching ever closer to the much anticipated 2024 rollout of next-gen Ryzen 9000 processors, please refer to a VideoCardz-authored timeline diagram (below)—"Granite Ridge" is an incoming AM5 desktop CPU family (reportedly utilizing Zen 5 and RDNA 2 tech), while "Strix Point" is scheduled to become a mobile APU series (Zen 5 + RDNA 3.5).

AMD Linux engineers have been working on "GFX1150" and "GFX1151" targets for a while—official references to "Strix 1/Strix Point" and "Strix Point Halo" have appeared several times on official development channels. Phoronix's head honcho—Michael Larabel—monitors these activities with keen interest, his latest finding indicates that Team Red is preparing open-source RadeonSI/RADV driver support for the GFX1151 IP. Their MESA 24.1 update merges in GPU enablement for possible high-end "Strix Point Halo" laptop processors—tech tipsters believe that these chiplet variants could sport up to sixteen Zen 5 CPU cores and forty RDNA 3.5 GPU cores.

AMD's enablement of the "GFX1150/Strix Point" GPU appeared online late last month—these monolithic laptop chips are alleged to sit below "Strix Point Halo" in Team Red's product hierarchy. Insiders suggest that the best configurations could house twelve Zen 5 CPU cores and sixteen RDNA 3.5 GPU cores. Phoronix posited that the "RDNA 3 refresh" graphics solution: "is just rumored for select APUs, while ultimately we'll see where this GFX 11.5.1 IP is found if for some further upgraded APU or something more special. In any event the open-source Linux driver support is coming together." According to official product roadmaps, the initial batch of "Strix Point" mobile chips are expected ship later this year—representing a proper next-gen upgrade over current "Hawk Point" offerings.

AMD's next generation Ryzen mobile processor family is undergoing a significant re-positioning of IP within its product stack, as the company introduces the new "elite experience" segment. The "Fire Range" mobile processor is a direct successor to "Dragon Range" MCM, with two 8-core "Zen 5" chiplets. It is essentially a BGA package of the desktop "Granite Ridge" processor, and comes with up to 16 "Zen 5" cores, for flagship gaming notebooks and mobile workstations. A segment below the current "Dragon Range" is the current "Hawk Point" silicon, driving premium experiences. There is a rather large CPU performance gap between the two, as would be the case between the upcoming "Fire Range" and "Kraken Point," which is why AMD is creating the "elite experience" segment, and filling it with "Strix Halo" and "Strix Point," which will square off against Core Ultra 7 and Core Ultra 9 processors, as well as certain HX-segment 14th Gen Core mobile processors. "Strix Point" has a significant core-count increase to 12, along with a large iGPU. We've extensively covered "Strix Point" in our older article, but now we have more information on the elusive "Kraken Point."

"Kraken Point" is codename for AMD's next-generation monolithic mobile processor silicon being designed to power Ryzen processor SKUs competing against the bulk of Intel Core Ultra 5 and Core Ultra 7 SKUs. This chip will be built on a refined 4 nm EUV node by TSMC, and will be monolithic. Its most interesting aspect is the CPU complex. It reportedly features a combination of four regular "Zen 5" cores, and four "Zen 5c" low power cores. All eight cores will likely share a single CCX, which means they share a common L3 cache, which enables easy movement of threads between the two kinds of cores, without having to make round-trips to the DRAM.

AMD's Ryzen 7040 "Phoenix" mobile APUs debuted last year with Ryzen AI capabilities (via onboard Xilinx IP), thanks to the fitting of an on-board NPU—Team Red's first generation XDNA AI Engine received immediate support on Windows platforms. Naturally, Linux users expressed frustration about being left out in the cold—later on in the year, AMD put some feelers out (as reported by Phoronix), and gauged interest in a potential Linux deployment of Ryzen AI. Fast forward to January 2024, we see movement with an initial release on open platforms—according to Michael Larabel's latest article: "More than 1,000 requests for Linux support were logged following that October statement and since then I've been hearing quietly of AMD working on Linux support... Well, there's now an open-source but currently out-of-tree driver available. "

AMD's GitHub has been updated with the "first public code drop of the XDNA Linux driver." According to System Requirements, the entry point "to run AI applications (test machine) on an Ryzen AI processor" is Phoenix silicon, as expected. Ryzen 8040 "Hawk Point" is presumably on the support list, since it shares the same basic underpinnings—albeit with greater NPU performance. One of AMD's GitHub authors has teased that "Strix" will also be supported in the future—second generation XDNA NPUs are expected to drop later this year. Targets for GFX1150 and GFX1151 were uncovered earlier this week—"Strix Point" and "Strix Point Halo" (respectively) are codenames for next generation Team Red APUs.

References to GFX1150 & GFX1151 targets have been spotted again—this time in a ROCm Github repository—by renowned hardware sleuth; Kepler_L2. These references were first spotted last summer, in an AMDGPU LLVM backend/compiler (reported by Phoronix)—industry experts immediately linked these target codes to next generation "Strix" APU families. The latest leak provides confirmation that the GFX1150 ID is tied to "Strix Point 1," while GFX1151 is an internal IP for "Strix Point Halo," or simply "Strix Halo." The freshly published ROCm Github's commit is titled: "Strix Halo Support and Strix support in staging," which corroborates previous rumors regarding Team Red's engineers being deep into development of Zen 5 (and RDNA 3.5)-based accelerated processing units.

AMD has published several processor product roadmaps with references to "Strix Point" next-gen APUs, with a targeted 2024 launch window. Their December 2023 "Advancing AI Event" confirmed that the "Strix Point" mobile family will sport "XDNA 2" NPUs—previous generation "Phoenix" and recently released "Hawk Point" processors are on the first iteration of XDNA (a spatial dataflow NPU architecture). It is speculated that a typical "Strix Point" laptop processor will pack 12 Zen 5 CPU cores and 16 RDNA 3.5 GPU cores. Team Red has kept quiet about "Strix Halo" (also known as "Sarlak") when conducting public-facing presentations—a loose 2025 launch window is being touted by the rumor mill. The most advanced examples could feature up to 16 Zen 5 CPU cores and 40 RDNA 3.5 GPU cores.

Today at the "Advancing AI" event, AMD was joined by industry leaders including Microsoft, Meta, Oracle, Dell Technologies, HPE, Lenovo, Supermicro, Arista, Broadcom and Cisco to showcase how these companies are working with AMD to deliver advanced AI solutions spanning from cloud to enterprise and PCs. AMD launched multiple new products at the event, including the AMD Instinct MI300 Series data center AI accelerators, ROCm 6 open software stack with significant optimizations and new features supporting Large Language Models (LLMs) and Ryzen 8040 Series processors with Ryzen AI.

"AI is the future of computing and AMD is uniquely positioned to power the end-to-end infrastructure that will define this AI era, from massive cloud installations to enterprise clusters and AI-enabled intelligent embedded devices and PCs," said AMD Chair and CEO Dr. Lisa Su. "We are seeing very strong demand for our new Instinct MI300 GPUs, which are the highest-performance accelerators in the world for generative AI. We are also building significant momentum for our data center AI solutions with the largest cloud companies, the industry's top server providers, and the most innovative AI startups ꟷ who we are working closely with to rapidly bring Instinct MI300 solutions to market that will dramatically accelerate the pace of innovation across the entire AI ecosystem."

AMD in its Ryzen 8040 series "Hawk Point" mobile processors announcement made the first mention of XDNA 2, its next-generation on-chip neural processing unit (NPU) architecture. Above all, the XDNA 2 NPU is expected to introduce an over 3 times improvement in performance over the first generation XDNA NPU powering the Ryzen 7040 series "Phoenix" processor. XDNA 2 is making its debut with AMD's next-generation Ryzen "Strix Point" mobile processor that the company looks to launch in 2024. While "Phoenix" offers 10 TOPS of NPU performance, AMD mentions an "over 3 times" performance improvement, which probably puts this figure at 32 TOPS for "Strix Point."

The "Strix Point" mobile processor is rumored to debut faster "Zen 5" CPU cores, a possible CPU core count increase to 12, and a much more powerful iGPU based on the updated RDNA 3.5 graphics architecture, with some SKUs expected to feature CU counts as high as 32, and designed to square off against the iGPU of the Apple M3 Max processor. Besides "Zen 5" CPU cores and RDNA 3.5 iGPU, we now know that even the NPU gets an overhaul with this XDNA 2 announcement, and a possible 32 TOPS NPU performance.

With Windows 11 23H2 setting the stage for increased prevalence of AI in client PC use cases, the new hardware battleground between AMD and its rivals Intel, Apple, and Qualcomm, will be in equipping their mobile processors with sufficient AI acceleration performance. AMD already introduced accelerated AI with the current "Phoenix" processor that debuts Ryzen AI, and its Xilinx XDNA hardware backend that provides a performance of up to 16 TOPS. This will see a 2-3 fold increase with the company's 2024-25 mobile processor lineup, according to a roadmap leak by "Moore's Law is Dead."

At the very top of the pile, in a product segment called "ultimate compute," which consists of large gaming notebooks, mobile workstations, and desktop-replacements; the company's current Ryzen 7045 "Dragon Range" processor will continue throughout 2024. Essentially a non-socketed version of the desktop "Raphael" MCM, "Dragon Range" features up to two 5 nm "Zen 4" CCDs for up to 16 cores, and a 6 nm cIOD. This processor lacks any form of AI acceleration. In 2025, the processor will be succeeded with "Fire Range," a similar non-socketed, mobile-friendly MCM that's derived from "Granite Ridge," with up to two 4 nm "Zen 5" CCDs for up to 16 cores; and the 6 nm cIOD. What's interesting to note here, is that the quasi-roadmap makes no mention of AI acceleration for "Fire Range," which means "Granite Ridge" could miss out on Ryzen AI acceleration from the processor. Modern discrete GPUs from both NVIDIA and AMD support AI accelerators, so this must have been AMD's consideration to exclude an XDNA-based Ryzen AI accelerator on "Fire Range" and "Granite Ridge."

Thanks to the information from Windows Report, we have received numerous details regarding Qualcomm's upcoming Snapdragon Elite X chip for laptops. The Snapdragon Elite X SoC is built on top of Nuvia-derived Oryon cores, which Qualcomm put 12 off in the SoC. While we don't know their base frequencies, the all-core boost reaches 3.8 GHz. The SoC can reach up to 4.3 GHz on single and dual-core boosting. However, the slide notes that this is all pure "big" core configuration of the SoC, so no big.LITTLE design is done. The GPU part of Snapdragon Elite X is still based on Qualcomm's Adreno IP; however, the performance figures are up significantly to reach 4.6 TeraFLOPS of supposedly FP32 single-precision power. Accompanying the CPU and GPU, there are dedicated AI and image processing accelerators, like Hexagon Neural Processing Unit (NPU), which can process 45 trillion operations per second (TOPS). For the camera, the Spectra Image Sensor Processor (ISP) is there to support up to 4K HDR video capture on a dual 36 MP or a single 64 MP camera setup.

The SoC supports LPDDR5X memory running at 8533 MT/s and a maximum capacity of 64 GB. Apparently, the memory controller is an 8-channel one with a 16-bit width and a maximum bandwidth of 136 GB/s. Snapdragon Elite X has PCIe 4.0 and supports UFS 4.0 for outside connection. All of this is packed on a die manufactured by TSMC on a 4 nm node. In addition to marketing excellent performance compared to x86 solutions, Qualcomm also advertises the SoC as power efficient. The slide notes that it uses 1/3 of the power at the same peak PC performance of x86 offerings. It is also interesting to note that the package will support WiFi7 and Bluetooth 5.4. Officially coming in 2024, the Snapdragon Elite X will have to compete with Intel's Meteor Lake and/or Arrow Lake, in addition to AMD Strix Point.

In recent developments, Linux's open-source graphics ecosystem is making significant strides to accommodate AMD's upcoming RDNA3.5 architecture, also known as RDNA3+ or GFX11.5. Mesa 23.3, a library in the Linux graphics software stack, is now being updated for RDNA3.5, marking a substantial milestone. This upcoming update is particularly tailored for the impending Ryzen 8000 "Strix Point" APU series, which will incorporate the Navi 3.5 architecture. While AMD has maintained secrecy regarding specific enhancements accompanying this refresh, we expect decent performance improvements. This includes the anticipation that the Ryzen 8000 APUs will feature an increased number of Compute Units (CUs), where the current highest number is 12 CUs, and the increase could bump that figure to 16 CUs. The official announcement of the Ryzen 8000 series is expected in early 2024 when we will learn more about its GPU configuration and performance.

"Strix Point" is the codename for AMD's next-generation mobile processor succeeding the current Ryzen 7040 series "Phoenix." More details of the processor emerged thanks to "All The Watts!!" on Twitter. The CPU of "Strix Point" will be heterogenous, in that it will feature two different kinds of CPU cores, but with essentially the same ISA and IPC. It is rumored that the processor will feature 4 "Zen 5" CPU cores, and 8 "Zen 5c" cores.

Both core types feature an identical IPC, but the "Zen 5" cores can hold onto higher boost frequencies, and have a wider frequency band, than the "Zen 5c" cores. From what we can deduce from the current "Zen 4c" cores, "Zen 5c" cores aren't strictly "efficiency" cores, as they still offer the full breadth of core ISA as "Zen 5," including SMT. In its maximum configuration, "Strix Point" will hence be a 12-core/24-thread processor. The two CPU core types sit in two different CCX (CPU core complexes), the "Zen 5" CCX has 4 cores sharing a 16 MB L3 cache, while the "Zen 5c" CCX shares a 16 MB L3 cache among 8 cores. AMD will probably use a software-based solution to ensure the right kind of workload from the OS is processed by the right kind of CPU core.

PerformanceDatabases has uncovered details relating to an alleged engineering sample of AMD's Ryzen 8000 "Strix Point" APU—likely insider sourced CPU-Z screengrabs from early last month revealed that the upcoming Zen 5-based laptop chip (in their words): "is built on a 4 nm Process and features the Big.Little CPU architecture with 4 Performance Cores and 8 Efficiency Cores. Both the P and E-Cores support hyper-threading. On the P-Core and E-Core, the L1 Data cache is 48 KB, while the L1 instruction cache is 32 KB. Each P Core boasts 1 MB of cache, and with E-Cores, it looks like there are 4 in a group, sharing 1 MB of L2 Cache. This setup is quite similar to Intel's design. Keep in mind, it's still in the engineering sample (ES) stage, so there's more to come. We'll keep you posted on any further updates!"

Another "AMD Strix - Internal GPU" example emerged late last week, this time in the form of a leaked HWInfo64 screen grab with some information completely covered up—the visible parts seems to point to this "Strix Point" APU featuring a core configuration as seen in the earlier leak, along with 1024 unified shaders. We can presume that the sampled Zen 5-based mobile APU possessing 16 RDNA 3.5 compute units (16 × 64 = 1024). Other details include a 45 W TDP rating, and the socket type being FP8 (as utilized by current Ryzen 7040U and 7040H(S) mobile SoCs). The 512 MB GDDR6 memory configuration is very likely an error—according to HWInfo64, the tested system was fitted with 32 GB of LPDDR5 memory. "Strix Point" looks to be the logical successor (in 2024) to AMD's current "Phoenix" lineup of mobile processors, as featured in gaming handhelds and laptops. PC hardware enthusiasts are expressing excitement about the upcoming APU series wielding impressive iGPU performance, with the potential to rival modern discrete mobile solutions.

Beating previous reports that AMD is increasing the CPU core count of its mobile monolithic processors from the present 8-core/16-thread to 12-core/24-thread; we are learning that the next-gen processor from the company, codenamed "Strix Point," will in fact be the company's first hybrid processor. The chip is expected to feature two kinds of CPU cores, with "Zen 5" being the microarchitecture behind the performance cores, and "Zen 5c" behind the efficiency cores. An engineering sample featuring 4 P-cores, and 8 E-cores, surfaced on the web, thanks to Performancedatabases. A HWiNFO screenshot reveals the engineering sample's core-configuration of 4x P-cores and 8x E-cores, with identical L1 cache sizes. Things get a little fuzzy with the L2 cache size detection, and L3 cache.

We know from the current "Zen 4c" core design that it is essentially a compacted version of "Zen 4" designed for higher-density chiplets that have 16 cores; and that it has both the same ISA and IPC as "Zen 4," with the only difference being that "Zen 4c" is designed with lower amounts of shared L3 caches at their disposal, are generally configured with lower clock speeds, and have higher energy efficiency than "Zen 4." "Zen 4c" cores also 35% smaller in die-area than "Zen 4." The company could develop "Zen 5c" CPU cores with similar design goals.

Based on details posted on Twitter/X by a pair of well known leakers, AMD appears to be working on a pair of different Ryzen 8000-series mobile processors. The previously known Strix Point is said to get up to four Zen 5 cores and eight Zen 5c cores, whereas the Strix Halo is said to get 16 Zen 5 cores, according to @Olrak29_. This is something that was posted by Moore's Law is Dead back in April as well, who claimed the chip will launch sometime at the end of 2024. MLID also suggested that the Strix Halo will feature a 40 CU GPU and a 256-bit LPDDR5X memory interface, making it a very different proposition from your average APU from AMD.

@kopite7kimi chimes in on Twitter to point out that "Strix Halo looks like a desktop Zen 5 with a different IOD." This is definitely something that would be possible for AMD to do and if we look at the MLID information, the Strix Halo processor appears to have something called a Mall Cache, which seems to be something of a catch all cache for the various components inside the chip, such as the AI Engine and the GPU. Time will tell if AMD delivers on Strix Halo or not, but this might be the first notebook processor that can handle gaming at a decent resolution without needing a discrete GPU. Then again, with a rumoured peak TDP of 120 W, this chip is also going to run hotter and draw more power than most mobile processors to date.

It looks like the monolithic silicon that succeeds "Phoenix," codenamed "Strix Point," will finally introduce an increase in CPU core counts for the thin-and-light and ultraportable mobile platforms. "Strix Point" is codename for the next-generation APU die being developed at AMD, which, according to a leaked MilkyWay@Home benchmark result, comes with a 12-core/24-thread CPU.

The silicon is identified by MilkyWay@Home with the OPN "AMD Eng Sample: 100-000000994-03_N," and CPU identification string "AuthenticAMD Family 26 Model 32 Stepping 0 -> B20F00." The "Strix Point" CPU could be the second time AMD has increased CPU core-counts per CCX. From "Zen 3" onward, the company increased the cores per CCX from 4 to 8, allowing a single "Zen 3" CCX on the "Cezanne" monolithic silicon to come with 8 cores. It's highly likely that with "Zen 5," the company is increasing the cores/CCX to 12, and that "Strix Point" has one of these CCXs.

As reported by Phoronix—references to GFX1150 & GFX1151 targets have been added to the AMDGPU LLVM backend/compiler, which seems to indicate that these are upcoming AMD APU models. AMD engineers have made to reference to GFX1150 as "Strix1" (full codename: Strix Point) in the past according to several sites, but the recent leak has GFX1151 mentioned for the first time.

Previous reports suggest that Team Red could be developing two Strix/Zen 5/RDNA 3.5 APUs with AI engine enhancements for laptops—a discovery of two separate GFX targets suggests that we are likely looking at different 12-core and 16-core models. The former is said to be a monolithic design with a TDP going up to 54 W. The 16-core "Strix Halo" (also known as "Starlak") is a very different type of product with leaks suggesting that it will have a maximum TDP of 120 W, and be based on a chiplet design. Zen 5 processor products are expected to arrive in the second half of 2024—with Granite Ridge filling in the desktop platform segment.

AMD in its 2022 Financial Analyst Day presentation announced the codename for the second generation of Ryzen desktop processors for Socket AM5, which is "Granite Ridge." A successor to the Ryzen 7000 "Raphael," the next-generation "Granite Ridge" processor will incorporate the "Zen 5" CPU microarchitecture, with its CPU complex dies (CCDs) built on the 4 nm silicon fabrication node. "Zen 5" will feature several core-level designs as detailed in our older article, including a redesigned front-end with greater parallelism, which should indicate a much large execution stage. The architecture could also incorporate AI/ML performance enhancements as AMD taps into Xilinx IP to add more fixed-function hardware backing the AI/ML capabilities of its processors.

The "Zen 5" microarchitecture makes its client debut with Ryzen "Granite Ridge," and server debut with EPYC "Turin." It's being speculated that AMD could give "Turin" a round of CPU core-count increases, while retaining the same SP5 infrastructure; which means we could see either smaller CCDs, or higher core-count per CCD with "Zen 5." Much like "Raphael," the next-gen "Granite Ridge" will be a series of high core-count desktop processors that will feature a functional iGPU that's good enough for desktop/productivity, though not gaming. AMD confirmed that it doesn't see "Raphael" as an APU, and that its definition of an "APU" is a processor with a large iGPU that's capable of gaming. The company's next such APU will be "Phoenix Point."

The recently leaked Windows 11 build appears to include certain optimizations for hybrid architecture processors. The developer preview provides a small improvement to Intel Lakefield processors and that boost will likely increase when Windows 11 officially launches. The Intel Lakefield processor family features a hybrid core design with 1 big core and 4 small cores, this is similar to the Apple M1 and similar hybrid designs are expected from AMD in the future. The Intel Lakefield Core i7-L16G7 CPU was tested by HotHardware and they measured performance improvements of 2% - 8% in various synthetic benchmarks including GeekBench 5, Cinebench R23, and PCMark 10. These performance improvements will benefit Intel's upcoming 12th generation Alder Lake processors and their Raptor Lake successors along with AMD's rumored Strix Point APUs.

Today, we have talked about AMD's upcoming Raphael lineup of processors in the article you can find here. However, it seems like the number of leaks on AMD's plans just keeps getting greater. Thanks to the "itacg" on Weibo, we have learned that AMD's Ryzen 8000 desktop series of processors are reportedly codenamed as Granite Ridge. This new codename denotes the Zen 5 based processors, manufactured on TSMC's 3 nm (N3) node. Another piece of information is that AMD's Ryzen 8000 series APUs are allegedly called Strix Point, and they also use the 3 nm technology, along with a combination of Zen 5 and Zen 4 core design IPs. We are not sure how this exactly works out, so we have to wait to find out more.