Tachyum today announced that it is bringing 1U and 2U platform solutions to market behind a strategy that ensures customers and partners will be able to quickly and easily test, benchmark and deploy Prodigy solutions across a broad range of supported applications and workloads. Tachyum's platform strategy includes offering evaluation platforms for early testing with OEMs and ODMs able to incorporate Prodigy into their own designs. The 2U evaluation platform, optimized to address the high-performance needs of HPC and Big AI, will be the first to sample in Q1 of 2025. The 1U platform, targeting applications such as AI inference and a wide range of cloud applications, follows in the second quarter.

Tachyum has chosen Chenbro as the chassis partner for the Prodigy evaluation platforms. Chenbro's standard chassis products provide solutions for both 1U and 2U that address Prodigy's high-performance requirements, allowing Tachyum to focus on the device and motherboard development. Both platforms will use the same 2-socket motherboard supporting 32 DDR5 DIMMs, as well as supporting storage integration for 16 E1.S SSDs. The evaluation platforms will initially launch as air-cooled infrastructures, allowing for fast, easy evaluations, with a 4-socket liquid-cooled platform arriving later.

Tachyum today announced that it has added a Performance Monitoring Unit (PMU) to its Prodigy FPGA emulation system, empowering customers and partners with the ability to address bottlenecks and better optimize Prodigy performance for all applications and workloads. The PMU is an essential tool for collecting information about performance bottlenecks. It offers the ability to record a wide range of events that encompass every aspect of the Prodigy Universal Processor without slowing down the application itself. Tools like perf then present this information after the application is finished, enabling the identification and characterization of performance bottlenecks that may exist in the processor core, full mesh interconnect fabric, memory, and I/O subsystems. Perf is a go-to instrument for everybody working on performance assessment and tuning under Linux. The PMU's wide range of performance counters - supported by both software C-model and FPGA - facilitates both system debugging and performance tuning.

Tachyum's PMU enables faster time to market by allowing customers and partners to quickly identify performance issues and rapidly converge to a solution for all phases of go-to-market, including evaluation, development and final production testing. It provides an invaluable tool suite for customers spanning a broad array of markets, including AI, HPC and cloud computing.

Tachyum announced that it has accepted a major purchase order from a US company to build a large-scale system, based on its 5 nm Prodigy Universal Processor chip, which delivers more than 50 exaflops performance that will exponentially exceed the computational capabilities of the fastest inference or generative AI supercomputers available anywhere in the world today.

Prodigy, the world's first Universal Processor, is engineered to transform the capacity, efficiency and economics of datacenters through its industry-leading performance for hyperscale, high-performance computing and AI workloads. When complete, the Prodigy-powered system will deliver a 25x multiplier vs. the world's fastest conventional supercomputer built just this year, and will achieve AI capabilities 25,000x larger than models for ChatGPT4.

Tachyum today announced that new EDA tools, utilized during the physical design phase of the Prodigy Universal Processor, have allowed the company to achieve significantly better results with chip specifications than previously anticipated, after the successful change in physical design tools - including an increase in the number of Prodigy cores to 192.

After RTL design coding, Tachyum began work on completing the physical design (the actual placement of transistors and wires) for Prodigy. After the Prodigy design team had to replace IPs, it also had to replace RTL simulation and physical design tools. Armed with a new set of EDA tools, Tachyum was able to optimize settings and options that increased the number of cores by 50 percent, and SERDES from 64 to 96 on each chip. Die size grew minimally, from 500mm2 to 600mm2 to accommodate improved physical capabilities. While Tachyum could add more of its very efficient cores and still fit into the 858mm2 reticle limit, these cores would be memory bandwidth limited, even with 16 DDR5 controllers running in excess of 7200MT/s. Tachyum cores have much higher performance than any other processor cores.

Tachyum announced today it will cease taking orders for its Prodigy Universal Processor Field Programmable Gate Array (FPGA) emulation system boards effective immediately. The company releases the final Prodigy build for tape-out. New partners and customers who wish to work with Prodigy FPGAs for product evaluation, performance measurements, software development, debugging and compatibility testing can arrange for private testing in Tachyum's facility. As these are shared systems, they can't be used for classified or proprietary data or data subject to regulatory governance.

The Prodigy hardware emulator consists of multiple FPGA and IO boards connected by cables in a rack. A single board with four FPGAs emulates eight Prodigy processor cores (a small fraction of the final Prodigy product design, which consists of 128 cores) including vector and matrix fixed and floating-point processing units. Deploying more FPGAs will improve test cycles by orders of magnitudes to achieve target quality, a risk reduction mechanism for early adopters.

Tachyum today announced its latest milestone of officially entering the final phase of test and development for the Prodigy Universal Processor. This last stage of Quality Assurance (QA) testing of all necessary ported software on a Field Programmable Gate Array (FPGA) for final testing will ensure the chip is production worthy.

Prodigy is currently running ported software on its software emulation platform. Once all Quality Assurance testing is successfully completed on FPGA, the Prodigy chip will be ready for tape-out this year. This phase of porting and finalizing all necessary software for tape out will ensure that existing applications run seamlessly and deliver industry-leading performance for hyperscale, high-performance computing and artificial intelligence workloads once the Prodigy chip is received from the fabrication house.

Tachyum announced today it has strengthened its presence in the Universal Chiplet Interconnect Express (UCIe) organization that develops and supports the chiplet ecosystem and in-package innovations. The UCIe community fosters collaboration among leaders in semiconductors, packaging, IP suppliers, foundries, and cloud services.

UCIe 1.0 is an open specification guiding the interconnection between chiplets within a package to ensure communication and functionality. Chiplet-based design increases density and capability compared to standard printed circuit-boards (PCBs), and enables much smaller, lower-cost solutions that consume less power. UCIe specification addresses the die-to-die I/O physical layer, die-to-die protocols, and software stack currently served by PCI Express (PCIe) and Compute Express Link (CXL) industry standards. UCIe ultimately extends the PCIe standard to in-package interconnects and allows the potential to bring CXL into in-package integration.

Tachyum today announced that the IP components -DDR5 RAM controller and high-performance, low-power DSP-based PHY - incorporated into the Prodigy Universal Processor have allowed it to achieve speeds of 6400 MT/s at nominal voltage for Prodigy chip which provides headroom for expected speeds of up to, or even over, 7200 MT/s.

The critical components supplied by a global leader in high-speed DDR DRAM controllers and DDR DRAM PHYs for the world's technology infrastructure, have enabled Tachyum engineers to integrate its IP into Prodigy less than 7 months after entering into a technology partnership. The quality of this IP and the support provided by working closely with Tachyum engineers have allowed the company to close DDR5 timings in record time.

Tachyum today announced that it has responded to a U.S. Department of Energy Request for Information soliciting Advanced Computing Ecosystems for DOE national laboratories engaged in scientific and national security research. Tachyum has submitted a proposal to create a 20-exaflop supercomputer based on Tachyum's Prodigy, the world's first universal processor.

The DOE's request calls for computing systems that are five to 10 times faster than those currently available and/or that can perform more complex applications in "data science, artificial intelligence, edge deployments at facilities, and science ecosystem problems, in addition to the traditional modeling and simulation applications."

Tachyum today launched the world's first universal processor, Prodigy, which unifies the functionality of a CPU, GPU and TPU in a single processor, creating a homogeneous architecture, while delivering massive performance improvements at a cost many times less than competing products.

After the company undertook its mission to conquer the processor performance plateau in nanometer-class chips and the systems they power, Tachyum has succeeded by launching its first commercial product. The Prodigy Cloud/AI/HPC supercomputer processor chip offers 4x the performance of the fastest Xeon, has 3x more raw performance than NVIDIA's H100 on HPC and has 6x more raw performance on AI training and inference workloads, and up to 10x performance at the same power. Prodigy is poised to overcome the challenges of increasing data center power consumption, low server utilization and stalled performance scaling.

Tachyum today announced it has completed validation of its Prodigy Universal Processor and software ecosystem with the operating system FreeBSD, and completed the Prodigy instruction set architecture (ISA) for FreeBSD porting. FreeBSD powers modern servers, desktops, and embedded platforms in environments that value performance, stability, and security. It is the platform of choice for many of the busiest websites and the most pervasive embedded networking and storage devices.

The validation of FreeBSD extends Tachyum's support for open-source operating systems and tools, including Linux, Yocto Project, PHP, MariaDB, PostgreSQL, Apache, QEMU, Git, RabbitMQ, and more.

Tachyum today announced that it was selected by the Slovak Republic to participate in the latest submission for the Important Projects of Common European Interest (IPCEI), to develop Prodigy 2 for HPC/AI. Prodigy 2 for HPC/AI will enable 1 AI Zettaflop and more than 10 DP Exaflops computers to support superhuman brain-scale computing by 2024 for under €1B. As part of this selection, Tachyum could receive a 49 million Euro grant to accelerate a second-generation of its Tachyum Prodigy processor for HPC/AI in a 3-nanometer process.

The IPCEI program can make a very important contribution to sustainable economic growth, jobs, competitiveness and resilience for industry and the economy in the European Union. IPCEI will strengthen the EU's open strategic autonomy by enabling breakthrough innovation and infrastructure projects through cross-border cooperation and with positive spill-over effects on the internal market and society as a whole.

Tachyum Inc. today announced that it has successfully executed the Linux boot process on the field-programmable gate array (FPGA) prototype of its Prodigy Universal Processor, in 2 months after taking delivery of the IO motherboard from manufacturing. This achievement proves the stability of the Prodigy emulation system and allows the company to move forward with additional testing before advancing to tape out.

Tachyum engineers were able to perform the Linux boot, execute a short user-mode program and shutdown the system on the fully functional FPGA emulation system. Not only does this successful test prove that the basic processor is stable, but interrupts, exceptions, timing, and system-mode transitions are, as well. This is a key milestone, which dramatically reduces risk, as booting and running large and complex pieces of software like Linux reliably on the Tachyum FPGA processor prototype shows that verification and hardware stability are past the most difficult turning point, and it is now obvious that verification and testing should successfully complete in the coming months. Designers are now shifting their attention to debug and verification processes, running hundreds of trillions of test cycles over the next few months, and running large scale user mode applications with compatibility testing to get the processor to production quality.

Tachyum Inc. today announced that it has taken delivery of an IO motherboard for its Prodigy Universal Processor hardware emulator from manufacturing. This provides the company with a complete system prototype integrating CPU, memory, PCI Express, networking and BMC management subsystems when connected to the previously announced field-programmable gate array (FPGA) emulation system board.

The Tachyum Prodigy FPGA DDR-IO Board connects to the Prodigy FPGA CPU Board to provide memory and IO connectivity for the FPGA-based CPU tiles. The fully functional Prodigy emulation system is now ready for further build out, including Linux boot and incorporation of additional test chips. It is available to customers to perform early testing and software development prior to a full four-socket reference design motherboard, which is expected to be available Q4 2021.

Tachyum Inc. today announced that it is signing early adopter customers for the software emulation system for its Prodigy Universal Processor, customers may begin the process of native software development (i.e. using Prodigy Instruction Set Architecture) and porting applications to run on Prodigy. Prodigy software emulation systems will be available at the end of January 2021.

Customers and partners can use Prodigy's software emulation for evaluation, development and debug, and with it, they can begin to transition existing applications that demand high performance and low power to run optimally on Prodigy processors. Pre-built systems include a Prodigy emulator, native Linux, toolchains, compilers, user mode applications, x86, ARM and RISC-V emulators. Software updates will be issued as needed.

Tachyum Inc. today announced that it has further expanded the capabilities of its Prodigy Universal Processor through support for TensorFlow and PyTorch environments, enabling a faster, less expensive and more dynamic solution for the most challenging artificial intelligence/machine learning workloads.

Analysts predict that AI revenue will surpass $300 billion by 2024 with a compound annual growth rate (CAGR) of up to 42 percent through 2027. AI is being heavily invested in by technology giants looking to make the technology more accessible for enterprise use-cases. They include self-driving vehicles to more sophisticated and control-intensive disciplines like Spiking Neural Nets, Explainable AI, Symbolic AI and Bio AI. When deployed into AI environments, Prodigy is able to simplify software processes, accelerate performance, save energy and better incorporate rich data sets to allow for faster innovation.

Tachyum Inc. today announced that it has successfully completed a demonstration showing its Prodigy Universal Processor running faster than any other processor, HPC or AI chips, including ones from NVIDIA and Intel. This is the latest of many recent milestones achieved by Tachyum as the company continues its march towards Prodigy's product release next year.

Tachyum demonstrated how its computational operation and the speed of its product design, using an industry-standard Verilog simulation of the actual Prodigy post layout hardware, is the superior solution to current competitive offerings. Not only does Prodigy execute instructions at very high speeds, but Tachyum now has an infrastructure implemented for automatically checking correct results from the Verilog RTL. These automated tests check Verilog output for correctness compared to Tachyum's C-model, which was used to measure performance, and is now the 'Golden Model' for the Verilog hardware simulation to ensure it produces identical, step-by-step results.

Tachyum Inc. announced that its Prodigy Universal Processor has successfully completed software emulation testing across x86, ARM and RISC-V binary environments. This important milestone demonstrates that Prodigy will enable customers to run their legacy applications transparently at launch with better performance than any contemporary or future ARM or RISC-V processors. Coupled with hyperscale data center workhorse programs such as Hadoop, Apache and more, which Tachyum is recompiling to Prodigy native code, this capability will ensure that Prodigy customers can run a broad spectrum of applications, right out of the box. Tachyum customers consistently indicate that they would run 100% native applications within 9-18 months of transitioning to the Tachyum platform to exceed performance of the fastest Xeon processor. The emulation is to smoothly transition to native software for Tachyum Prodigy.

Dr. Radoslav Danilak, founder and CEO of semiconductor startup Tachyum Inc., will discuss the company's "Gamechanger" universal processor reference design solution for HPC and AI environments as part of ISC High Performance 2020 Digital event June 22-25.

ISC 2020 Digital is an inaugural online event that focuses on bringing the most critical developments and trends in high-performance computing, machine learning and data analytics for the benefit of the global HPC community. Danilak presents "4 Exaflops AI Training With a 32 Rack Tachyum System" to help virtual attendees learn about the Tachyum universal processor architecture, performance, reference design motherboard, chassis, rack, switches, management software and system software that make up the reference design. The pre-recorded presentation will be available for viewing June 24 from 4 p.m. CEST to registered participants of the event and remain online for 14 days after it debuts.

Semiconductor startup Tachyum Inc. announced today that it has achieved, on schedule, a major milestone in the detailed physical design of its Prodigy Universal Processor. Tachyum now has a complete chip layout, with a verified detailed physical design of more than 90 percent of the design silicon area.

Tachyum's Prodigy is the world's first Universal Processor, combining general-purpose processors, high-performance computing (HPC), artificial intelligence (AI), deep machine learning (ML), explainable AI, bio AI and other AI disciplines within a single chip. This latest milestone achieved integration of key, high-quality Tachyum IP within a multiprocessor environment, and with DDR4/DDR5 DRAM controllers, PCIE 5.0, 112Gb SERDES, USB, GPIO, PLLs and various I/Os. Results of the layout indicate that Prodigy's die size is within product design goals with top-level clocking results that are better than expected.

Silicon Valley startup Tachyum, founded in 2016, is ready with its crowning product, the Tachyum Prodigy. The startup recently received an investment from the Slovak government in hopes of job-creation in the country. The Prodigy is what its makers call "a universal processor," which "outperforms the fastest Xeon at 10X lower power." The company won't mention what machine architecture it uses (whether it's Arm or MIPS, or its own architecture). Its data-sheet is otherwise full of specs that scream at you.

To begin with, its top trim, the Prodigy T16128, packs 128 cores on a single package, complete with 64-bit address space, 512-bit vector extensions, matrix multiplication fixed-function hardware that accelerate AI/ML, and 4 IPC at up to 4.00 GHz core clock. Tachyum began the processor's software-side support, with an FPGA emulator in December 2019 (so you can emulate the processor on an FPGA and begin developing for it), C/C++ and Fortran compilers; debuggers and profilers, tensorflow compilers, and a Linux distribution that's optimized it. The I/O capabilities of this chip are something else.