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AMD Opteron 6276

16
Cores
16
Threads
115 W
TDP
2.3 GHz
Frequency
3.2 GHz
Boost
Interlagos
Codename
Socket G34
Socket
AMD Socket G34
AMD Socket G34
The AMD Opteron 6276 was a server/workstation processor with 16 cores, launched in November 2011. It is part of the Opteron lineup, using the Interlagos architecture with Socket G34. To further increase overall system performance, up to four Opteron 6276 CPUs can work together in a multi-processor (SMP) configuration. Opteron 6276 has 8 MB of L3 cache per die and operates at 2.3 GHz by default, but can boost up to 3.2 GHz, depending on the workload. AMD is making the Opteron 6276 on a 32 nm production node using 2,400 million transistors. The multiplier is locked on Opteron 6276, which limits its overclocking potential.
With a TDP of 115 W, the Opteron 6276 consumes a lot of power, so good cooling is definitely needed. AMD's processor supports DDR3 memory. For communication with other components in the system, Opteron 6276 uses a PCI-Express Gen 2 connection. This processor lacks integrated graphics, you might need a graphics card.
Hardware virtualization is available on the Opteron 6276, which greatly improves virtual machine performance. Programs using Advanced Vector Extensions (AVX) can run on this processor, boosting performance for calculation-heavy applications.

Physical

Socket: AMD Socket G34
Process Size: 32 nm
Transistors: 2,400 million
Die Size: 316 mm²
Package:

Processor

Market: Server/Workstation
Production Status: End-of-life
Release Date: Nov 14th, 2011
Part#: OS6276WKTGGGU

Performance

Frequency: 2.3 GHz
Turbo Clock: up to 3.2 GHz
Base Clock: 200 MHz
Multiplier: 11.5x
Multiplier Unlocked: No
TDP: 115 W

Architecture

Codename: Interlagos
Generation: Opteron
(Interlagos)
Memory Support: DDR3
ECC Memory: No
PCI-Express: Gen 2

Core Config

# of Cores: 16
# of Threads: 16
SMP # CPUs: 4
Integrated Graphics: N/A

Cache

Cache L1: 768 KB
Cache L2: 16 MB
Cache L3: 8 MB (per die)

Features

  • MMX
  • SSE
  • SSE2
  • SSE3
  • SSSE3
  • SSE4.1
  • SSE4.2
  • SSE4a
  • AMD64
  • AMD-V
  • EVP
  • AES
  • CLMUL
  • AVX
  • XOP
  • FMA4
  • CVT16

Notes

16KB L1 data cache per core.
64KB L1 instruction cache shared per two cores (per module).
2MB L2 cache shared per two cores (per module).
8MB L3 cache shared per eight cores (per die).

14MB total L3 cache available when using HT Assist.
Dec 23rd, 2024 19:35 EST change timezone

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