Official AMD Radeon 6000 Series Discussion Thread

[cadaveca]

Yeah, I agree with that, for sure. But, what leaves doubt in my mind is the just simply availability of the highspeed GDDR5 that would be required...which is only supposed to be available later this month( but again, I did mention that this could easily explain why Cayman is delayed until later, as Barts doesn't need highspeed vram).

To me, that would leave Cayman's potential at the mercy of memory manufacturers, and I jsut don't like that. but you may very well be right. I think it might be 2x2...seems to me that is required for the rumoured performance.

But, I think RBE will be more, due to extra shaders. Those shaders need more cache(ie, tmu, and ergo, texturing), and that cache must connect to something. AS you say, I do not expect the ROP/RBE side of things to change design, so to make the gpu work, they'd still need extra ROPS. It's more than possible for each controller to connect to more ROPs, though...depends on just how efficient each part of the bankend is. If the dispatch controller is more efficient(and would have to be, to feed higher-order shaders), then staying 256-bit, with 12 ROPs per controller, makes alot of sense.

 

[largon]

Hynix about their 44nm GDDR5 in July 2010:

Hynix will start volume production of 2Gb GDDR5 from September, 2010. For the time being, this product has been in evaluation at major system manufacturers.
This is the world¡¯s first 44nm technology based graphics memory. This ¡®green¡¯ product can operate with 1.35V power supply and still provide high data processing capability of 28GB/s(Gigabyte per second).
2Gb GDDR5 comply with the needs of high-end graphics, 3D and full HD, in desktop and notebook applications. It will be also suitable in super computers designed with a GPGPU (General Purpose Graphics Processor Unit) architecture.
Hynix would maintain its leadership in graphics memory market with leading edge 44nm 2Gb GDDR5 and the current 54nm 1Gb GDDR5.

http://www.hynix.com/mail/newsletter_2010_07/eng/sub02.html

Elpida about their 50nm GDDR5 in June 2010:

Elpida Completes Development of 2-Gigabit GDDR5
Full Entry into the Graphics Business Now Achieved

TOKYO, JAPAN, June 24, 2010 – Elpida Memory, Inc. (TOKYO: 6665), Japan's leading global supplier of Dynamic Random Access Memory (DRAM), today announced that it had completed development of a high-density, high-speed, low-power consumption 50nm process 2-gigabit GDDR5 using copper interconnects (product name: EDW2032BABG). The new GDDR5, the first graphics DRAM designed by Elpida, was developed at the company's Munich Design Center in Germany.

(...)

At present, Elpida is outsourcing 1-gigabit GDDR3/GDDR5 production to Taiwan-based Winbond Electronics Corporation. The company's Hiroshima Plant, however, plans to handle 2-gigabit GDDR5 production. Basing this production in Hiroshima enables Elpida to provide a more timely and flexible response to anticipated future growth in graphics DRAM demand.

Elpida plans to begin sample shipments of the new 2-gigabit GDDR5 in July 2010. Mass production is expected to get underway in the CY 2010 third quarter (July-Sept).

2-gigabit GDDR5 Overview
Product name EDW2032BABG
Memory density 2-gigabit
Speed 7Gbps (max.)
Configuration 64-megabit x32, 8-bank

http://www.elpida.com/en/news/2010/06-24.html

 

[cadaveca]

Hynix 1.35v stuff is 4.0 and 3.5 gbps only.

http://www.hynix.com/products/graph...nu3=05&RK=26&RAM_NAME=GDDR5 SDRAM&SUB_RAM=2Gb

Elpida is still ES only(datasheet still not available to public):

http://www.elpida.com/en/products/gddr5.html

Likewise, samsung sampled when the other two did, but no info on actual production.

 

[largon]

From what I've seen website product portfolios are not kept very up to date.
And by their respective sites both Hynix and Elpida have 1Gbit 6.0Gbps in MP. And 1Gbit/IC is what is needed for 1GB with eight chips.

 

[cadaveca]

Yes, but I was led to beleive that 6-series would be 2GB standard(2Gb ram required).


Hynix is up-to-date, 1.35v stuff is in mass production, and that said TBD a couple of weeks ago. Maybe same stuff, different voltage(bin) for highspeed...

Anyway, I'm guessing about ALL of this stuff. ROPs, TMUs, memory bus stuff...I ain't got no idea whatsoever. The best I can go by is publically available info.

As such, I was simply explaining why I feel I do...not arguing to say you are wrong, and I am right.

Chances are, I'm wrong. I think you and I both have about hte same success on these things over the years...could go either way.

I jsut refuse to be optomistic...see my sig.

 

[cheezburger]

So if they change architecture then they might not be directly related? Or is this a blanket statement that applies to all ATI/AMD cards that have ever been made, and will ever be made?


Slot 1, how long ago was that?

And you do realize that the slot was just a way to change existing CPU sockets, right? So on the board didn't have the silicon made onto it. The reason they never went further was the extra contacts, pins, and total package cost was higher than just a socket made on a board.


Lastly, if a PCB cannot, than how do we arrive at a 2.4Ghz HT, or higher, or memory speeds of 1Ghz, or 2+Ghz DDR?

about slot 1 just go read intel blog to find out the detail. your information isn't exactly correct...it's latency and clock rate limt.

ram never exceed over 2GHZ.......more likely 2GT(giga transfer) effective. basic clock of rame never goes above 400mhz per rate. and about HT the basic clock is still 200mhz per bus. like ddr3 ram the "2.4ghz" is just effective transfer rate. not necessary to be real time frequency.

AMD knows there's positively a boatload of potential in GDDR5's power (= read: frequency) envelope so wider bus is totally unnecessary, bandwidth can be gained more easily by slapping in faster chippery. And I think Cypress' 32RBEs perform perfectly fine, modern games are heavily shader and post processing driven. The only things worth increasing at available silicon area are texturing and shading throughput. And of course AMD needs to fix their broken AF!

And I doubt we'll see a total overhaul in ALU config vs. Cypress. Most likely they just hacked away one simple MADD to increase efficiency of SPUs by showing mercy on the over-booked shader scheduler that seems to plague Cypress. Another scenario I find plausible would be the reduction of two simple MADDs with the addition of one complex MADD. That is, it's either 3+1 or 2+2.

shader don;t necessary increase frame rate. it doesn't matter how many shader you have and how these console ported are so shader heavy and post processing(like cached). it needs fill rate to unleash the performance and currently 32 rops are still too bottleneck to larger high definition texture and complex pixel/texel. however most console port are either poorly in texture rating detail and lack of pixel/bumping due to the lack of console memory size and hardware so which those title require more "shader" to make it look detail rich without consume too much resource on the system and since most of console are 30fps limit which rops aint really important....however this is PC and average idiot should go and die by buying these console port game and telling others that "frame rate and filling rate aint important and 30fps is most what human need" those loads of BS...you like 30fps but i want 300+fps and it require most rops to push it and sadly currently 32/48rops ain't powerful enough.

if you just want shaders...go play console please!

 

[Steevo]

about slot 1 just go read intel blog to find out the detail. your information isn't exactly correct...it's latency and clock rate limt.

ram never exceed over 2GHZ.......more likely 2GT(giga transfer) effective. basic clock of rame never goes above 400mhz per rate. and about HT the basic clock is still 200mhz per bus. like ddr3 ram the "2.4ghz" is just effective transfer rate. not necessary to be real time frequency.




shader don;t necessary increase frame rate. it doesn't matter how many shader you have and how these console ported are so shader heavy and post processing(like cached). it needs fill rate to unleash the performance and currently 32 rops are still too bottleneck to larger high definition texture and complex pixel/texel. however most console port are either poorly in texture rating detail and lack of pixel/bumping due to the lack of console memory size and hardware so which those title require more "shader" to make it look detail rich without consume too much resource on the system and since most of console are 30fps limit which rops aint really important....however this is p[-c and average idiot should go and die by buying these console port game and telling others that "frame rate and filling rate aint important and 30fps is most what human need" those loads of BS...you like 30fps but i want 300+fps and it require most rops to push it and sadly currently 32/48rops ain't powerful enough.

Computer Hardware,Memory,Desktop Memory,DDR3 2500 ...


1.25Ghz

Newegg has many module kits that run over the supposed "1Ghz" barrier.


Again, my personal board runs 2.4Ghz on the HyperTransport bus, so that means the traces are changing frequency 2.4 billion times per second. Twice that is the actual data rate, on the leading and trailing edge of the wave.

They left Slot 1 as it was junk, prohibited flow of air, cost more, ran slower, had higher failure rates. Basically it was trash.

Back in the Athlon days we had DDR 400, or 200Mhz RAM. Now we run much faster RAM with our much faster chips.

 

[cheezburger]

Computer Hardware,Memory,Desktop Memory,DDR3 2500 ...


1.25Ghz

Newegg has many module kits that run over the supposed "1Ghz" barrier.


Again, my personal board runs 2.4Ghz on the HyperTransport bus, so that means the traces are changing frequency 2.4 billion times per second. Twice that is the actual data rate, on the leading and trailing edge of the wave.

They left Slot 1 as it was junk, prohibited flow of air, cost more, ran slower, had higher failure rates. Basically it was trash.

Back in the Athlon days we had DDR 400, or 200Mhz RAM. Now we run much faster RAM with our much faster chips.

DDR3 is 8x rating so if we dividing that DDR3 2600 into 8 rail it will be 325mhz per rail.... DDR3 1600 is 200mhz but 1600mhz effective.

trace rate =/=data rate =/= clock rate

hyper transport works just like old day front speed bus except it's on much higher multiplier rating. HT2.0 was 1GT and the multiplier rating was 5x and 3.0 is 12x but the basic clock is still 200mhz....

My take:
32RBEs
96TMUs*
480SPUs* (4ALUs/SPU)
256bit ~GDDR5-6400

*divided in three RPEs

you're take for nothing.

i actually surprise how eastern european are thinking differently...technology is always base on performance and performance can only done brutal force. not cheaper and slimer size.......i would throw 500k on single graphic card then on a BMW or ferrari....

 

[mastrdrver]

AMD knows there's positively a boatload of potential in GDDR5's power (= read: frequency) envelope so wider bus is totally unnecessary, bandwidth can be gained more easily by slapping in faster chippery. And I think Cypress' 32RBEs perform perfectly fine, modern games are heavily shader and post processing driven. The only things worth increasing at available silicon area are texturing and shading throughput. And of course AMD needs to fix their broken AF!

And I doubt we'll see a total overhaul in ALU config vs. Cypress. Most likely they just hacked away one simple MADD to increase efficiency of SPUs by showing mercy on the over-booked shader scheduler that seems to plague Cypress. Another scenario I find plausible would be the reduction of two simple MADDs with the addition of one complex MADD. That is, it's either 3+1 or 2+2.

Yeah, I agree with that, for sure. But, what leaves doubt in my mind is the just simply availability of the highspeed GDDR5 that would be required...which is only supposed to be available later this month( but again, I did mention that this could easily explain why Cayman is delayed until later, as Barts doesn't need highspeed vram).

To me, that would leave Cayman's potential at the mercy of memory manufacturers, and I jsut don't like that. but you may very well be right. I think it might be 2x2...seems to me that is required for the rumoured performance.

But, I think RBE will be more, due to extra shaders. Those shaders need more cache(ie, tmu, and ergo, texturing), and that cache must connect to something. AS you say, I do not expect the ROP/RBE side of things to change design, so to make the gpu work, they'd still need extra ROPS. It's more than possible for each controller to connect to more ROPs, though...depends on just how efficient each part of the bankend is. If the dispatch controller is more efficient(and would have to be, to feed higher-order shaders), then staying 256-bit, with 12 ROPs per controller, makes alot of sense.

The complex part is dead. Its 4D simple from everything they are saying over on Beyond 3D.

 

[cheezburger]

The complex part is dead. Its 4D simple from everything they are saying over on Beyond 3D.

you realize that simple shader arrangement are far worse than complex...4 simple setup may only equal to 1/2 cuda....i called this hoax

 

[wolf]

cheezburger, none of what you said changes the fact that GPU's can indeed run over 1ghz sustained on their own PCB, I will digress that no manufacturer has released a card with the whole chip running over 1ghz, but as I said many overclockers run 1ghz+ on 5 series ATI cards sans problems.

and my point about clock domains within Nvidia GPU's, the shaders run 1.3ghz+

EDIT: some 4890 cards were sold out of the box at 1000 core, with headroom to spare.

 

[a_ump]

it isn't simple, its 4 medium instead of the old (1 complex+4 simple). i kno it probly isn't exact like this but in hypothetical value of performance. 1-3 ratings
Old:
3+1+1+1+1=7
2+2+2+2=8

i kno that doesn't count for crap but imo, they're not gonna take steps backwards with a new architecture, ATi/AMD go the safe route if u've all noticed lately. 1280SPU on just the HD 6770 wasn't it? there's just more everything, core and uncore has been more than likely improved performance wise

 

[cheezburger]

cheezburger, none of what you said changes the fact that GPU's can indeed run over 1ghz sustained on their own PCB, I will digress that no manufacturer has released a card with the whole chip running over 1ghz, but as I said many overclockers run 1ghz+ on 5 series ATI cards sans problems.

and my point about clock domains within Nvidia GPU's, the shaders run 1.3ghz+

EDIT: some 4890 cards were sold out of the box at 1000 core, with headroom to spare.

shader clock doesn't count, when shader goes to SIMD cluster and rops it will be same clock as core operate. when nvida's core never exceed to 1ghz.

plus clockratism is just stupid and can clock do if you can just increase more performance by adding more rops/cache/bus?? why clock rate? anything after pentium 4 had change the term of clockrate and clock rate are useless.

 

[mastrdrver]

you realize that simple shader arrangement are far worse than complex...4 simple setup may only equal to 1/2 cuda....i called this hoax

Now I do.

Was thinking I had read that the t unit was dropped but now after rereading looks like it maybe like a 2+2 like I think cad stated.

Fwiw though almost a year old.

As far as high speed Gddr5 in mass production: this, this, and this.

Btw this is N.I. not S.I. coming

TSMC 40nm constraint to delay 6700 series and possible full G104 coming by end of year to meet new ATI offerings?

I think the 6700 thing is still fud though a full G104 coming as a GTX 475 is interesting.

 

[wahdangun]

@ cheezburger, : so MSI use pixie dust to make that cyclone card huh?
4890 Cyclone SOC -- 1000 MHz Core clock | 4000 MHz Memory clock

and btw ring bus is dead, because its inefficient

 

[Fishymachine]

DDR3 is 8x rating

No DDR3 and (so far just gDDR4 and samples)DDR4 are 2x rating

Really

and second of all in ATi-AMD core and shader clocks are the same

 

[DriedFrogPills]

what i want to know is will AMD still go ahead with the stupid change of name? I have heard that its a load of bollocks and it keeps raising it head

 

[wolf]

shader clock doesn't count, when shader goes to SIMD cluster and rops it will be same clock as core operate. when nvida's core never exceed to 1ghz.

plus clockratism is just stupid and can clock do if you can just increase more performance by adding more rops/cache/bus?? why clock rate? anything after pentium 4 had change the term of clockrate and clock rate are useless.

all I'm doin is refuting your blanket statement;

remember PCB board can't substain any clockrate over 1GHZ

because it's simply not true.

 

[largon]

No DDR3 and (so far just gDDR4 and samples)DDR4 are 2x rating

Correcting cheezburger is kinda useless, he'll just ignore everything and move on to other ramblings. I think he's just an weird kind of a troll who gets his kick from writing utter nonsense and seeing people derail threads when they start replying him to call out his BS. I've ignorelisted him but from time to time when I feel like laughing I peek at his posts - for example I find it funny he thinks that Finland is in eastern europe.

 

[cheezburger]

No DDR3 and (so far just gDDR4 and samples)DDR4 are 2x rating

Really

and second of all in ATi-AMD core and shader clocks are the same

http://en.wikipedia.org/wiki/DDR3_SDRAM

which the highest clock on chip is 266mhz...for what you were saying are I/O clock and effective data rate.

this is the evidence and you fanoi should just wake the f*** up

Correcting cheezburger is kinda useless, he'll just ignore everything and move on to other ramblings. I think he's just an weird kind of a troll who gets his kick from writing utter nonsense and seeing people derail threads when they start replying him to call out his BS. But I do find it funny he thinks Finland is in eastern europe. I've ignorelisted him but from time to time when I feel like laughing I peek at his posts.

read the wikipedia article, ignore everything that people mention? they based on no evidence at all and most of they don't even know about micro architecture! all they everknow is clock rate and higher clock means good to them.

@ cheezburger, : so MSI use pixie dust to make that cyclone card huh?
4890 Cyclone SOC -- 1000 MHz Core clock | 4000 MHz Memory clock

and btw ring bus is dead, because its inefficient

clock rate is the most useless part in micro chip and it don't not help performance like it used to be and I don't see reason why overclock should be exist.

oh I still remember some fanboi claimed they need 10ghz+ processor for future gaming. before core 2 duo introduced. but then again architecture and more cache/unit/bus width is what boot the performance. not clock. you honestly believe amd will launch agpu that feature 2ghz+ core clock while the structure are so simple and 100mm^2 die size and sell for 199 bucks? overclocker's wet dream!

 

[WhiteLotus]

Didn't they teach you that Wikipedia is not a credible source?

 

[crazyeyesreaper]

what i find funny is he tells a forum member to watch there attitude when the person i see with a biggest attitude in need of adjustment is a few posts above

 

[cheezburger]

Didn't they teach you that Wikipedia is not a credible source?

they are only not reliable when it comes to some controversial article like chart or list but this one is community protected.

back to topic, the based clock of chip never goes higher since DDR era

 

[crazyeyesreaper]

my question why are we discussing desktop ram in a fucking GPU speculation thread zzzzzzz

 

[cheezburger]

my question why are we discussing desktop ram in a fucking GPU speculation thread zzzzzzz

what i find funny is he tells a forum member to watch there attitude when the person i see with a biggest attitude in need of adjustment is a few posts above

because they claim the chip that soldier on PCB board can go beyond 1ghz which they bring ram and other like nvidia's shader clock. go read the post above then you're realize how this thread can go off topic this far. largon brought the worst example that he claim cayman will still be 32 rops while having 1920sp and clock beyond 1ghz which i am completely disagree with but he just starting taunting me instead of following discussion.

my theory is this cayman will not go above 1ghz core clock and will go 64 rops and 512bit bus.