Official AMD Radeon 6000 Series Discussion Thread

[the54thvoid]

I demand Cheezburger and Benetanegia get a room and start a cuddle down.

Otherwise, lets wait for some freaking benchmarks. But i support Ben's comments regarding suggested performance. If the 6970 beats 5970 (Caymen beats Hemlock) I'll eat my piss stained pants.

Antilles will beat Hemlock.

 

[EastCoasthandle]

barts is not mid range. it's upper mid range that similar to old 4870's market position while the real main stream will still be refine juniper with much higher core clock and higher speed GDDR5 with tessellation unlock while still keep 5D shader. barts xt/pro are being place in position between mid range and high end with new architecture. cayman xt/pro are in position of high end line and is 3/2 larger than barts and much higher bus/rop/ALU. antillies is for enthusiast and made of 2x barts. jus like good old day 4870 was in position range of $250~299 except there are larger high end chip on barts's top while 4870 did not have any high end single chip on top of it and the high end position was taken by 4850x2 and enthusiast are 4870x2. now cayman is on position of 4850x2 and antillies is on same position like 4870x2



juniper...juniper (but i like jupiter..it sound much better)

According to the charts they are the mid range cards. They are higher in performance then the juniper.
--------------------


Hmm, the charts don't provide anything regarding a new AA method (MLAA).

 

[cheezburger]

Prove that you can't. NI is most probably like Fermi where front end and computing units are inside the same clusters, but rops are outside of them, because that's what makes most sense. Having all your architecture (ranging from memory bus, rop count, L2 cache) depend on how many clusters you can enable is stupid. Not to mention ackward, tell me where in NI is the L2 cache? It's is split between RPEs too? How do MCs communicate properly with the rest of the chip if there's many different L2? Is it outside the RPEs and is the same for all the NI chips, while only RPE number changes?

If absolutely everything is split between RPEs, performance is going to be horrible, because NI would be basically 3 small GPUs glued together and it would be subjected to 3-way crossfire scaling == bad.

Nah, I tell you that NI is going to be identical to Fermi, or in any case it would have even less units integrated into RPEs, not more. ROPs, L2 and MCs are going to be independent that's for sure, and seeing as how geometry performance is not much better than Cypress according to leaks, I bet that vertex setup/raster is still one single unit in the front end sitting just after the threading engine.

well it's difficult to say how bad the scaling penalty is going to be on semi-multicore gpu but i'm sure amd will give the answer. and about l2 cache issue with RPE that reminds me of bulldozer's die pic which it may adopt the same cache design on NI as well. the l2 cache will be on one side with ALU while the raster will facing the bus controller. it may be just guessing because i can't bring real die map to you at the moment. which that RPE more complicate than we think....

According to the charts they are the mid range cards. They are higher in performance then then juniper.
--------------------


Hmm, the charts don't provide anything regarding a new AA method (MLAA).

juniper is going to be at the midrange line for a while due to the rebrand scheme and as long as barts's price aint that pretty as we assume it won't be a mid range card. just like 8800gt in its position and barts will do the same.

MLAA, may be it will leak more info soon

 

[BraveSoul]

im wondering, will the more complex shaders of southern islands increase the folding performance of Radeon cards?
_____________________________

Antec1200 filter project

 

[cadaveca]

No, the limit with ATi cards folding is software, currently. The ATi FAH core hasn't been updated really, in several years...like 2008. And yes, I'm still getting the same FAH performance with new cards as I was back then.

If you want a FAH vga, buy nVidia.

 

[EastCoasthandle]

juniper is going to be at the midrange line for a while due to the rebrand scheme and as long as barts's price aint that pretty as we assume it won't be a mid range card. just like 8800gt in its position and barts will do the same.

MLAA, may be it will leak more info soon

We will simply disagree as I don't see Juniper as a midrange card (neither does the chart suggest it). And the chart appears to indicate that it will be phased out. Also we still have Turks and Caicos.

 

[inferKNOX]

@cheez & Ben:

Do you guys think that AMD are going to include (1920x1200 supporting) mini-DP -> DVI adapters with the cards? Is so, how many, 1 or 2?

 

[Benetanegia]

well it's difficult to say how bad the scaling penalty is going to be on semi-multicore gpu but i'm sure amd will give the answer. and about l2 cache issue with RPE that reminds me of bulldozer's die pic which it may adopt the same cache design on NI as well. the l2 cache will be on one side with ALU while the raster will facing the bus controller. it may be just guessing because i can't bring real die map to you at the moment. which that RPE more complicate than we think....

No Bulldozer has a shared L2 cache and that's the point. L2 or L3 (if it has one), in any case the higher order one, must be shared, because you need a single pool for the entire GPU unless you want data to be replicated several times both inside the GPU and in vram. If you are creating rendering clusters, it's just like that, it cannot be in a different way, because otherwise RPE #2 wouldn't be able to finish the work that was initiated in RPE#1, no matter where the work was left by the other cluster, which is the whole point of creating these clusters in the first place.

So now that is clear that L2 must be a single shared one, it's clear it must be outside RPEs and sit between them and vram (MCs), so clearly if "the l2 cache will be on one side with ALU while the raster will facing the bus controller" that's how it is in Fermi and how it was in Cypress and in order to be like that ROPs are necessarily outside the RPEs. ding! ding!

 

[JATownes]

No Bulldozer has a shared L2 cache and that's the point. L2 or L3 (if it has one), in any case the higher order one, must be shared, because you need a single pool for the entire GPU unless you want data to be replicated several times both inside the GPU and in vram. If you are creating rendering clusters, it's just like that, it cannot be in a different way, because otherwise RPE #2 wouldn't be able to finish the work that was initiated in RPE#1, no matter where the work was left by the other cluster, which is the whole point of creating these clusters in the first place.

So now that is clear that L2 must be a single shared one, it's clear it must be outside RPEs and sit between them and vram (MCs), so clearly if "the l2 cache will be on one side with ALU while the raster will facing the bus controller" that's how it is in Fermi and how it was in Cypress and in order to be like that ROPs are necessarily outside the RPEs. ding! ding!

I think we have a winner.

Edit: Just in case some didn't see this, first pics of PCB and die shots. Courtesy of BTA, by way of IT168. http://www.techpowerup.com/132802/Radeon-HD-6870-PCB-and-GPU-Pictured.html

 

[wahdangun]

@cheez & Ben:
http://i55.tinypic.com/inh4sh.jpg

Do you guys think that AMD are going to include (1920x1200 supporting) mini-DP -> DVI adapters with the cards? Is so, how many, 1 or 2?

i think that was up to AIB partner but i think they will include it because it doesn't contain any active part i think it will be cheap enough just like DVI to HDMI converter

i can't wait for the benches and how the 4D shader stand up versus 5 D

 

[nt300]

Can we get single slot cooking for HD 6870 and HD 6970. It would be nice so we have more room to use the extra PCIE slots.

 

[Benetanegia]

Can we get single slot cooking for HD 6870 and HD 6970. It would be nice so we have more room to use the extra PCIE slots.

hhmmmmmmmmm! thinking about single slot cooking is making me feel hungry...


and making me think about a naked GTX480 frying eggs for some reason.

 

[BraveSoul]

naked GTX480 frying eggs

is there a video? im sure it can, if a small pan(or something like that) is effectively attached to the gpu, im sure the heat would suffice for a healthy eggwhite
_____________________________

Antec1200 filter project

 

[Benetanegia]

is there a video? im sure it can, if a small pan(or something like that) is effectively attached to the gpu, im sure the heat would suffice for a healthy eggwhite

There's some pictures around the web, but the idea has always been stupid anyway and only intended for fun. And egg can be cooked at any temp above 70 Celsius iirc, so basically ANY GPU or CPU can cook an egg.

 

[HalfAHertz]

I made a few a while back when the gtx480 was released. Are you thinking about those?

 

[Benetanegia]

I made a few a while back when the gtx480 was released. Are you thinking about those?

http://forums.techpowerup.com/attachment.php?attachmentid=34429&d=1269343513
http://forums.techpowerup.com/attachment.php?attachmentid=34430&d=1269343520
http://forums.techpowerup.com/attachment.php?attachmentid=34431&d=1269343526
http://forums.techpowerup.com/attachment.php?attachmentid=34432&d=1269343531
http://forums.techpowerup.com/attachment.php?attachmentid=34433&d=1269343537

No, no. There's actual pictures of it. Ok, let's google it for you guys...

EDIT: lol 3 secs to find it:

http://www.techeye.net/hardware/how-to-cooking-eggs-on-a-fermi-card

 

[BeepBeep2]

*whistles*


Old 6770 slide:

New Barts XT slide:

Note-

Barts XT: Core Clock has gone down 50 Mhz to 850 Mhz from 900, SP's were reduced from 1280 to 960, Texture Units reduced from 64 to 48, as well as board power going marginally up. Board power moves from 146w vs (greater than) >150w, ... Remember, the 5850's max board power is 151w.

Barts PRO: Core Clock is now listed at 700-725 Mhz (was 725), SP's were reduced from 1120 to 800, Texture Units dropped from 56 to 40, and board power went from 114w to (less than) <150w.

You guys have to realize that Barts XT has changed a bit recently.
The HD6770 listed in leaked slides has the card at 900 Mhz core, with 1280 Stream Processors, 64 texture units.

1 multiply+add "mad" (2 FP) ops per cycle * number of stream processors (1280) * core clock (900 Mhz) equals the 2.304 TFlops as that slide states.

This was the 6770, and it's specs are still worse than the "current" 5870. It's closer to the 5850 in performance. (Which is acceptable at a $250 price point.) Pay very close attention to the max board power for Barts XT on this slide. 146w.

The black slide I have above shows Barts XT as 850 Mhz core, with 960 Stream Processors, 48 texture units @ greater than 150w. Again, the 5850's max board power is 151w.
Those specs leave us with 1 multiply+add (2 FP) ops per cycle * number of stream processors (960) (which is cut down by 320 from 1280) * core clock (850 Mhz)
= 1.632 TFLops of Single Precision.

At a $260 price point, that leaves us with something between a 5770 and 5850. (Remember, 5850's can be had for $260 at this time.)

Performance wise (Single Precision only, and ONLY Single Precision) it is equal to a 5770 at 1020 Mhz.
HD5770 (Can be had for $135, or $125 w/ rebate on Newegg.com on Oct. 15 2010):
10 SIMD's
2 FP ops * 800 SP's * 850 Mhz Core Clock = 1.36 TFLops/s SP
40 Texture Units * 850 Mhz Core Clock = 34 GTexel/s
16 ROP's * 850 Mhz Core Clock = 13.6 GPixel/s
64 Z/Stencils * 850 Mhz Core Clock = 54.4 GSamples/s
1200 Mhz GDDR5 * 128 bit bus / 2 times = 76.8 GB/s
Max board power: 108w

Overclocked HD5770 @ 1020/1445 ($140 to $160 for voltage control):
10 SIMD's
2 FP ops * 800 SP's * 1020 Mhz Core Clock = 1.632 TFLops/s SP
40 Texture Units * 1020 Mhz Core Clock = 40.8 GTexel/s
16 ROP's * 1020 Mhz Core Clock = 16.32 GPixel/s
64 Z/Stencils * 1020 Mhz Core Clock = 65.28 GSamples/s
1200 Mhz GDDR5 * 128 bit bus / 2 times = 76.8 GB/s
Or for fun: 1445 Mhz GDDR5 * 128 bit bus / 2 times = 92.5 GB/s

HD6850 (Barts PRO) from black slide priced at $200 (?):
10 SIMD's
2 FP Ops * 800 SP's * 700-725 Mhz Core Clock = 1.12 TFLops SP to 1.16 TFLops SP
40 Texture Units * 700-725 Mhz Core Clock = 28 GTexel/s to 29 GTexel/s
32 ROP's * 700-725 Mhz Core Clock = 22.4 GPixel/s to 23.2 GPixel/s
128 Z/Stencils * 700-725 Mhz 89.6 GSamples/s to 92.8 GSamples/s
1000 Mhz GDDR5 * 256 bit bus / 2 times = 128 GB/s
Max board power: (less than) <150w

New HD6850 (Barts PRO) priced around $200 to $225:
10 SIMD's
2 FP Ops * 800 SP's * 775 Mhz Core Clock = 1.24 TFLops SP
40 Texture Units * 775 Mhz Core Clock = 31 GTexel/s
32 ROP's * 775 Mhz Core Clock = 24.8 GPixel/s
128 Z/Stencils * 775 Mhz = 99.2 GSamples/s
1000 Mhz GDDR5 (?) * 256 bit bus / 2 times = 128 GB/s
1200 Mhz GDDR5 (?) * 256 bit bus / 2 times = 153.6 GB/s (I doubt we will see this on a midrange card)

HD5850 (currently selling for $260 @ Newegg.com on Oct. 15 2010):
18 SIMD's
2 FP Ops * 1440 SP's * 725 Mhz Core Clock = 2.088 TFLops SP
72 Texture Units * 725 Mhz Core Clock = 52.2 GTexel/s
32 ROP's * 725 Mhz Core Clock = 23.2 GPixel/s
128 Z/Stencils * 725 Mhz Core Clock = 92.8 GSamples/s
1000 Mhz GDDR5 * 256 bit bus / 2 times = 128 GB/s.
Maximum Board Power = 151w

HD5850 Overclocked to 1000/1300
18 SIMD's
2 FP ops * 1440 SP's * 1000 Core Clock = 2.88 TFLops SP (note, this is nearly twice as fast as the stock 6870 below)
72 Texture Units * 1000 Core Clock = 72 GTexel/s
32 ROP's * 1000 Core Clock = 32 GPixel/s
128 Z/Stencils * 1000 Core Clock = 128 GSamples/s
1300 Mhz GDDR5 * 256 bit bus / 2 = 166.4 GB/s

HD6870 (Barts XT) from the black slide ($260?):
12 SIMD's
2 FP ops * 960 SP's * 850 Mhz Core Clock = 1.632 TFLops SP
48 Texture Units * 850 Mhz Core Clock = 40.8 GTexel/s
32 ROP's * 850 Mhz Core Clock = 27.2 GPixel/s
128 Z/Stencils (as noted on black chart) * 850 Mhz Core Clock = 108.8 GSamples/s
1050 Mhz GDDR5 * 256 bit bus / 2 = 134.4 GB/s
Max board power: (greater than) >150w

Theoretical HD6870 with completely insane overclock @ 1100/1450:
12 SIMD's
2 FP ops * 960 SP's * 1100 Mhz Core Clock = 2.112 TFLops SP
48 Texture Units * 1100 Mhz Core Clock = 42.8 GTexel/s
32 ROP's * 1100 Mhz Core Clock = 35.2 GPixel/s
128 Z/Stencils * 1100 Mhz Core Clock = 140.8 GSamples/s
1450 Mhz GDDR5 * 256 bit bus / 2 = 185.6 GB/s

HD5870 (currently selling for $350, as low as $310 with rebate on Newegg.com as of Oct. 15 2010):
20 SIMD's
2 FP ops * 1600 SP's * 850 Mhz Core Clock = 2.72 TFLops SP
80 Texture Units * 850 Mhz Core Clock = 68.0 GTexel/s
32 ROP's * 850 Mhz Core Clock = 27.2 GPixel/s
128 Z/Stencils * 850 Mhz Core Clock = 108.8 GSamples/s
1200 Mhz GDDR5 * 256 bit bus / 2 = 153.6 GB/s
Max board power: 188w

Overclocked 5870 @ 1000/1325 :
20 SIMD's
2 FP ops * 1600 SP's * 1000 Mhz Core Clock = 3.20 TFLops SP
80 Texture Units * 1000 Mhz Core Clock = 80.0 GTexel/s
32 ROP's * 1000 Mhz Core Clock = 32.0 GPixel/s
128 Z/Stencils * 1000 Mhz Core Clock = 128.0 GSamples/s
1325 Mhz GDDR5 * 256 bit bus / 2 = 169.7 GB/s

Also keep in mind that new Barts 6800 Series cards only feature one crossfire interconnect.

 

[cheezburger]

barts xt, hd 6870. 1280sp:64:32. 256bit bus and 950mhz core clock

barts pro: hd 6850 1120:56:32 256bit bus 850mhz core clock

it look exactly like the card in the pic that btarunr post, while he claim it was "cayman"

 

[beautyless]

Thanks BeepBeep2 for predicted specification of new series with available information.
I compared hd 5850, 6870, 5870 at standard speed. hd 6870 has a weak point in the Texture Unit only.
Number of stream processor and TFlops even less but have a new design, so it is not a problem in performance.

 

[Goodman]

Looks like we all have to wait a bit longer until the 22 of October & not the 18 or 19 October as expected?

http://www.techeye.net/chips/amd-to-launch-gtx-460-killing-radeon-hd-6850-6870-next-week

The new 1GB Radeon cards are expected to launch on October 22, but AMD has not confirmed this date. Some sources suggested that AMD had previously slated October 12 for the launch, which was delayed to October 19 and now further delayed to launch on the Friday of that week instead. If this is the case then further delays could be expected.

 

[EastCoasthandle]

If the 6870 can get close to the 5870 in games and cost between $229-$249 that would be better than the "8800gt effect" that nv was looking for out of the 460.

 

[erocker]

Looks like we all have to wait a bit longer until the 22 of October & not the 18 or 19 October as expected?

http://www.techeye.net/chips/amd-to-launch-gtx-460-killing-radeon-hd-6850-6870-next-week

No, that's right. On the 18th AMD is putting out the official info on the cards and on the 22nd they'll be in retail.

 

[wahdangun]

 

[Zen_]

Any semi-reliable info on pricing yet? Getting kinda worried that these are both going to be over $200...

 

[Semi-Lobster]

http://i1.sinaimg.cn/IT/h/2010-10-16/1287181212_3f6FJ5.jpg

http://i0.sinaimg.cn/IT/h/2010-10-16/1287181212_cpw6rY.jpg

http://i1.sinaimg.cn/IT/h/2010-10-16/1287181212_h00l31.jpg

http://i1.sinaimg.cn/IT/h/2010-10-16/1287181212_Ie3QUU.jpg

http://i2.sinaimg.cn/IT/h/2010-10-16/1287181212_npwgsR.jpg

http://i0.sinaimg.cn/IT/h/2010-10-16/1287181212_bXuW3N.jpg

http://i3.sinaimg.cn/IT/h/2010-10-16/1287181212_crnUbh.jpg

http://i0.sinaimg.cn/IT/h/2010-10-16/1287181212_HzQCid.jpg

http://i3.sinaimg.cn/IT/h/2010-10-16/1287181212_0aWdu9.jpg

WOW! Great find! Any close up of the specs so we can confirm all these rumours once and for all?