Zambezi AM3+ Core Logic Slated for Q2-2011

[JF-AMD]

Prediction: amd will only shine with software designed for this amd architecture.

What is the software designed for the architecture? If you look at the new instructions supposted by bulldozer, you see most of them are already integrated in tools or will be by launch:

SSSE3 - in tools
SSE4.1 - in tools
SSE4.2 - in tools
AES acceleration - in tools
PCLMULQDQ - in tools
AVX - will be in tools by launch

The only 2 remaining instructions are XOP and FMA4. I don't have status on them because I can't comment on tool vendors' products.

So there won't be "bulldozer applications", pretty much everything will be a bulldozer application.

Is Liano going to run on AM+ as well or will it need a separate socket? I am guessing it will at least require a new south bridge which will map out some pci-e lanes for display purposes?

It's Llano, not Liano. It uses a different socket because you have to route the video out of the package.

 

[MikeMurphy]

^ thanks for the clarification.

 

[Roph]

wish they would just add native sli support, I know it'd be counter productive towards their effects in the graphics market but if the bulldozer is as good as were led to believe it'd probably go a long way to helping increase their market share in cpu's. Unless they can dramitically increase the scaling performance in crossfire for the 69xx cards

From what I remember, SLI is essentially locked by nvidia. You must pay to "license" it from them. It is simply an artificial limitation imposed by Nvidia, it is not AMD's fault.

 

[btarunr]

Hmmm I am curious when SB will have integrated USB 3.0??

When Intel improve their chipset bus (that which connects NB to SB, or CPU to PCH), and be in a position to adopt it.

Currently Intel uses a piss-poor DMI link which is physically PCI-E 1.1 x4 with Intel's own low-overhead data coding scheme. That translates to just 1 GB/s per direction, 2 GB/s total. There's no bandwidth for a SATA 6 Gb/s controller or a couple of USB 3.0 controllers that are embedded in the SB/PCH.

X58 to ICH10R as well as LGA1156 CPU to PCH is DMI.

Chipset bus is the biggest bottleneck in today's systems. AMD was able to alleviate it by doubling the bandwidth, so 8-series chipsets use a PCI-E 2.0 x4, but it could only accommodate a 6-port SATA 6 Gb/s AHCI/RAID controller.

 

[chithanh]

It's Llano, not Liano. It uses a different socket because you have to route the video out of the package.

Really? From what I have read it has nothing to do with video. Intel socket 1156 for example supports CPUs both with and without integrated graphics. If I am not mistaken, the different socket is because Llano platforms don't have a separate northbridge.

 

[crazyeyesreaper]

and you do realize newbie that JF AMD is an employee of AMD correct and works as a Server Rep or w.e so whatever youve read is pretty much garbage compared to what he says also way to rez and old thread

 

[JF-AMD]

Yes, but if you have used up all of your pins and now you have to route out video, what do you do?

The AM3 socket has 939 pins, which means about 200 fewer pins than the intel. Yes, 1156 supports both, but you have enough pins to support video out and if you don't need it they are empty.

 

[btarunr]

Yes, but if you have used up all of your pins and now you have to route out video, what do you do?

You still embed a GPU, leave a DAC in the chipset, and send data to it over existing HyperTransport pins (primary HT link).

 

[HalfAHertz]

You still embed a GPU, leave a DAC in the chipset, and send data to it over existing HyperTransport pins (primary HT link).

wouldn't that eat up its precious bandwidth?

 

[btarunr]

wouldn't that eat up its precious bandwidth?

Intel FDI does the same thing at 338 MB/s. There's plenty of bandwidth in 4000 MT/s HT links for that. Besides, for a GPU to stay in the northbridge and access system memory (UMA), the HyperTransport link is strained even more. If you place the GPU on-die, you're freeing up the link a little, and also chopping that GPU-to-UMA access latency.

 

[poohbear]

I was hoping they would have a DX11 outfit out there. Intel just recently said something about introducing the USB 3.0 native spec (saw it in MaximumPC I think) so maybe they might get it out in time for the 9 series and intels newest chipsets to have it. Wishful thinking I know.

I think either Complement or Compliment will work unless they are using it as a reference to complement something, like a bottle of wine with a meal

intel isnt crazy about supporting USB 3.0, they've been delaying it time and again because they have their own interface that they're pushing: light peak

 

[HalfAHertz]

intel isnt crazy about supporting USB 3.0, they've been delaying it time and again because they have their own interface that they're pushing: light peak

From what I understood about light peak, it's just an intermediate interface - as in southbridge>lightpeak>USB3, so the chipset would still need usb3 support...