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PCI Express 2.0 ready for use

Jimmy 2004

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BEAVERTON, Ore. - January 15, 2007 - PCI-SIG , the Special Interest Group responsible for PCI Express industry-standard I/O technology, today announced the availability of the PCI Express Base 2.0 specification. After a 60-day review of revision 0.9 of the specification in Fall 2006, members of the PCI-SIG finalized and released PCI Express (PCIe) 2.0, which doubles the interconnect bit rate from 2.5GT/s to 5GT/s to support high-bandwidth applications.

The specification seamlessly extends the data rate to 5GT/s in a manner compatible with all existing PCIe 1.1 products currently supporting 2.5GT/s signaling. The key benefit of PCIe 2.0 is its faster signaling, effectively increasing the aggregate bandwidth of a 16-lane link to approximately 16 GB/s. The higher bandwidth will allow product designers to implement narrower interconnect links to achieve high performance while reducing cost.

"In today's world, applications are becoming more advanced and are requiring more bandwidth," said Al Yanes, PCI-SIG chairman and president. "This is the perfect time to release PCIe 2.0, which not only supports high-bandwidth applications such as high-end graphics, but also adds many new architectural enhancements."

In addition to the faster signaling rate, PCI-SIG working groups also added several new protocol layer improvements to the PCIe Base 2.0 specification which will allow developers to design more intelligent devices to optimize platform performance and power consumption while maintaining interoperability, low cost and fast market introduction. These architecture improvements include:

  • Dynamic link speed management allows developers to control the speed at which the link is operating
  • Link bandwidth notification alerts platform software (operating system, device drivers, etc) of changes in link speed and width
  • Capability structure expansion increases control registers to better manage devices, slots and the interconnect
  • Access control services allows for optional controls to manage peer-to-peer transactions
  • Completion timeout control allows developers to define a required disable mechanism for transaction timeouts
  • Function-level reset provides an optional mechanism to reset functions within a multi-function device
  • Power limit redefinition enables slot power limit values to accommodate devices that consume higher power

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EviLZeD

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seems like another upgrades needed now sounds good the 8900gtx prolly use it
 

Easy Rhino

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now i can say im waiting for the new pcie 2.0 cards rather than say im waiting for the r600 cards.
 

PVTCaboose1337

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On noes! PCI-E 1.0 = AGP now! AGP IS STILL NOT DEAD!!!
 
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To bad this will be completely useless. They just got done pushing the limits of agp yet alone pci-e 1.0. This is just another way to steal money from consumers.
 

PVTCaboose1337

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To bad this will be completely useless. They just got done pushing the limits of agp yet alone pci-e 1.0. This is just another way to steal money from consumers.

Kinda. This is like SATA 1.5gb vs SATA 3gbs, you can't really tell the difference, but it is somehow better.
 

Random Murderer

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psssh, the 8800 gtx STILL doesnt even use all 16 lanes.... and we're already moving over to 32 lane busses? i suppose it was bound to happen, but it seems a little premature to me...

EDIT: when 64 lane busses arrive we'll have reached the limit of 64-bit processors, you can only have so many traces on a mobo dedicated to a single application. half of all traces from the proc dedicated to a single expansion slot (i.e. pci-e 32x) seems a little asinine... am i the only one that feels this way?
 

Jimmy 2004

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Kinda. This is like SATA 1.5gb vs SATA 3gbs, you can't really tell the difference, but it is somehow better.

I suppose this (and the PCI vs AGP thing) are exactly the same as the SATA 1.5 vs SATA 3.0. If you had a hard drive that could actually read data at that speed then you would certainly see a difference, but the only data that will actually benefit is that which comes from the buffer, other than that the performance difference is minimal. This is the same thing: although PCI-E 2.0 may be faster than the old PCI-E, none of the graphics cards will actually be fast enough to make use of the extra bandwidth so the performance difference is, once again, minimal. AGP is still fast enough to play the latest games, but manufacturers want us to move over to PCI-E because it can do more stuff. Admittedly AGP might be too slow in a couple of years, but it was written off to early.
 

EastCoasthandle

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I suppose this (and the PCI vs AGP thing) are exactly the same as the SATA 1.5 vs SATA 3.0. If you had a hard drive that could actually read data at that speed then you would certainly see a difference, but the only data that will actually benefit is that which comes from the buffer, other than that the performance difference is minimal. This is the same thing: although PCI-E 2.0 may be faster than the old PCI-E, none of the graphics cards will actually be fast enough to make use of the extra bandwidth so the performance difference is, once again, minimal. AGP is still fast enough to play the latest games, but manufacturers want us to move over to PCI-E because it can do more stuff. Admittedly AGP might be too slow in a couple of years, but it was written off to early.
QFT

:toast:
 
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I somehow feel sorry for the PCI-E 16x and AGP8x now...

the company that made PCI-E Should have just made the AGP slot length longer... so it could be backwards compatible.
 

EiS

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geez my X800XT PE is still fast enough to play any game on max settings except for Oblivion and it is only a AGP card
 

KennyT772

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Well it is not creating a 32 lane slot. That would be a dumb idea and the slot would be the entire width of the motherboard. The press release stated that, the current 2.5GT/s data rate will be replaced with a 5GT/s data rate. Completely backwards compatible, and pin for pin compatible. Same general deal as S-ATA, faster data rate but other then that the same.
 
D

Deleted member 24505

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just means we will all buy new hardware,like a donkey after the carrot is all.
 
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But the thing that bugs me is that I know itll cost manufacturers more money and thus they charge consumers more money. I want to see a statement saying that it cost the same or its just BS.
 

Track

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This ISNT like AGP and PCIe 1.0. You can still stick any PCIe card into any PCIe slot. The only difference is that in 5 years when graphics cards need more than 16 lanes, they will have it. Course by then we will have PCIe 8.0.. And of course if u have PCIe 1.0 u will need at least one 6-pin PCIe power connector.
 

KennyT772

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guys guys. they are not adding lanes, as that would require a physical change. all they are doing is upping the datarate. it is the same exact thing they did with agp. it started at 1x 33mhz i believe. then it doulbed to 66 then 133 and finally 266. here they are just going from 2.5 to 5 GT/s, whatever that is. all they are doing is upping the frequency, so if you have a 8900gtx (assume the 8900gtx has pci-e-2) but a pci-e-1 mobo it will run at 2.5. if you have a pci-e-2 mobo and a x1800 it will run at 2.5. but with a pci-e-2 mobo and a 8900gtx it will run at 5.
 
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This ISNT like AGP and PCIe 1.0. You can still stick any PCIe card into any PCIe slot. The only difference is that in 5 years when graphics cards need more than 16 lanes, they will have it. Course by then we will have PCIe 8.0.. And of course if u have PCIe 1.0 u will need at least one 6-pin PCIe power connector.

In 5 years we wont be using pci-e 2.0 and another difference is it raises prices.
 

KennyT772

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how does it raise prices? all you have to do is create the pci-e chip that can control the speeds. oh wait i forgot that all newer cards are expensive..:rolleyes:
 

EastCoasthandle

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I call this marketing 201 IMO. As others have stated, this is not needed and there is no benefit to having it (reminds me of a OS about to hit the market :shadedshu )
 
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Lame

Remember when USB 1.1 went to USB 2.0? Speeds went from transfer rates of 12 MBits/second to transfer speeds of 480 MBits/second.

i.e. bandwidth increased 40x. :toast:

And here we have PCIe 2.0. With a bandwidth increase of just 2x.:roll:

LAME LAME LAME.

If they weren't ready, then they should have waited. IMO the new specification should be at least 5-10x. That means a 1 slot/lane card would now have the capacity of a (current) four slot/lane card. And an X1950 Pro could be fit into a 4 slot/lane socket. That makes for low profile etc.

2x is just a waste of time. :banghead:
 
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Its rather stupid that they didn't improve AGP's capability IMO, or make the PCI-E slots backwards compatible.
 

boecke

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Absolute stupidity, I think we should 'Google-bomb' "Miserable failure" to the PCI-e 2.0 information page instead of George W. Bush
 

kakazza

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Why do you guys think it will cost more when they state 2-3 times that it will reduce costs?
Also PCIe 2.0 will be backwards compatible to 1.0, so what?

It is always better when the bus is way faster than the device using it. My car can go at 160km/h yet I hardly ever go over 50km/h. I should now cry that the motor is far too strong and go back to steam engines. (I win at faulty comparisions!)

There is no SLI with AGP.
AGP and PCIe 1.0 need aditional power connectors, 2.0 can just draw more from the bus (higher limit at least).
AGP is just for graphics cards, PCIe is used for almost anything now.
If PCIe 2.0 is more efficient and can use less power, I am all for it.


Why are you against improvements? Why not go a step further when you can?

"the industry attempts to avoid the limiting factor for the speed at which data are transferred"
 
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Its rather stupid that they didn't improve AGP's capability IMO, or make the PCI-E slots backwards compatible.

AGP half duplex port, PCIe is full duplex, quite a difference there. And keeping things backwards compatible limits it. Sure it's fun but it makes things complex and inefficient. Building things from the ground up is necessary some times. And even so, the PCI-e protocol is backwards compatible with PCI. So it isn't all that bad.
 

overcast

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What about latency differences? Regardless if the bandwidth is used to full potential, if it can get information in and out faster, that is a significant upgrade.
 
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