- Joined
- Jun 2, 2011
- Messages
- 767 (0.15/day)
System Name | An experiment in continuous upgrading |
---|---|
Processor | Intel Core i7 2600k @ 4.4 Ghz | FX-8570 @ 4.0 Ghz | Phenom II X4 965 |
Motherboard | MSI P67A-GD53 | MSI 990FXA-GD80 | Asus M4A79 Deluxe |
Cooling | Noctua NH-D14 | Zalman CNPS10x | Coolermaster*212+ |
Memory | 24gb DDR3-1866 |8Gb | 8Gb |
Video Card(s) | ASUS GTX 970 Turbo x 2 (SLI) | Sapphire Radeon 7970 + GTX 670 (PhysX) | Radeon 4870 1Gb |
Storage | 2x240gb SSD + 4tb SSHD + HDDs | 240gb SSD + HDDs | 120gb SSD + WD Blue 500gb |
Display(s) | ASUS VG248 144hz + Samsung S23A700D 120hz + 3D Vision | 40" Sony 1080p TV | 23" 1080p |
Case | Cooler Master HAF-X | Lian-Li PC-8 | Antec 302 |
Audio Device(s) | Senn. PC360 G4ME | Sound Blaster Zx | Generic |
Power Supply | Corsair TX850W | Corsair TX 750 | OCZ 700 |
Mouse | Steelseries Sensei | Logitech G402 W/L | Generic |
Keyboard | Filco Majetouch Ninja Tenkeyless MX Black | Logitech wireless |SteelSeries 6Gv2 MX Red |
Software | About 800 top-rated games. | 200 top-rated games | No games |
Benchmark Scores | No time for benching, I prefer gaming. |
why BD faild? this is why:
BD die shot should look very much like this
http://cache.futurelooks.com/wordpr...1/10/AMD_Bulldozer_Review_FX-8000-500x201.png
but instead it looks like this
http://www.xbitlabs.com/images/news/2011-10/amd_bulldozer_orochi_die_floorplan.jpg
they've got 800 million transistors for in/out, logic, NB, wasted space, etc. so some how the have managed to waste a whole phenom 2 x4's worth of transistors on what should really take about, what, 150mill tansistors? also why is the "unified" L3 cache separated into 4 sections with such massive gaps?
maybe it was a learning curve using mostly software to design the chips, who knows? what is clearly evident is that they are not using the space available to them efficiently.
quoting some estimations on die area by X-bit:
"AMD publicly said that each Bulldozer dual-core CPU module with 2MB unified L2 cache contains 213 million transistors and is 30.9mm2 large. By contrast, die size of one processing engine of Llano processor (11-layer 32nm SOI, K10.5+ micro-architecture) is 9.69mm2 (without L2 cache), which indicates that AMD has succeeded in minimizing elements of its new micro-architecture so to maintain small size and production cost of the novelty.
As a result, all four CPU modules with L2 cache within Zambezi/Orochi processor consist of 852 million of transistors and take 123.6mm2 of die space. Assuming that 8MB of L3 cache (6 bits per cell) consist of 405 million of transistors, it leaves around whopping 800 million of transistors to various input/output interfaces, dual-channel DDR3 memory controller as well as various logic and routing inside the chip.
800 million of transistors - which take up a lot of die space - in an incredibly high number for various I/O, memory, logic, etc. For example, Intel's Core i-series "Sandy Bridge" quad-core chip with integrated graphics consists of 995 million."
This horror of truth gives me hope for piledriver. Even AMD should be able to fix that some, and increase performance, or decrease its size, or increase cache, or put a quad-channel DDR3 controller on there without increasing its size... SOMETHING DAMMIT. Or is it DAAMIT?