Toshiba Develops World's First 4-bit Per Cell QLC NAND Flash Memory

[btarunr]

Toshiba America Electronic Components, Inc. (TAEC) today announced the latest generation of its BiCS FLASH three-dimensional (3D) flash memory. The newest BiCS FLASH device features 4-bit-per-cell, quadruple-level cell (QLC) technology and is the first 3D flash memory device to do so. Toshiba's QLC technology enables larger (768 gigabit) die capacity than the company's third-generation 512Gb 3-bit-per-cell, triple-level cell (TLC), and pushes the boundaries of flash memory technology.

Toshiba's new QLC BiCS FLASH device features a 64-layer stacked cell structure and achieves the world's largest die capacity (768Gb/96GB). QLC flash memory also enables a 1.5-terabyte (TB) device with a 16-die stacked architecture in a single package - featuring the industry's largest capacity. This is a fifty percent increase in capacity per package when compared to Toshiba's earlier announcement of a 1TB device with a 16-die stacked architecture in a single package - which also offered the largest capacity in the industry at the time.



The technical challenges posed by QLC technology needed to be overcome, as increasing the number of bits-per-cell by one within the same electron count requires twice the accuracy of TLC technology. Toshiba has combined its advanced circuit design and leading 3D flash memory process technology to overcome this challenge, successfully creating the world's first QLC 3D flash memory.

The timing of this achievement is especially beneficial to datacenters. "The introduction of QLC technology sets the stage for solving many of the challenges facing datacenters today," noted Greg Wong, founder and principal analyst at Forward Insights. "For datacenters, QLC SSDs can be an excellent design choice for reducing power consumption and lowering footprint. Additionally, as the push for higher capacity HDDs leads to an increase in areal density and drives up the weight per successive generation, it has become common to see a 42U rack only half-filled due to exceeding maximum weight or power supply. Flash memory-based storage solutions weigh less and realize improved power efficiencies, enabling datacenters to achieve maximum rack capacity."

Toshiba Memory Corporation was among the first to produce 64-layer 256-gigabit (32GB) devices, and has continued to demonstrate its leadership position by advancing the development of its technology. Toshiba was the first company to publically discuss QLC technology (at last year's Flash Memory Summit) and it has long been a part of the company's roadmap strategy for high-density, smaller chip size flash memory solutions. The new QLC device is targeted to applications including enterprise and consumer SSDs, tablets and memory cards.

"From SLC to MLC and MLC to TLC, large technology shifts are often met by industry resistance and the introduction of QLC is no exception," noted Scott Nelson, senior vice president of TAEC's memory business unit. "There will always be demand for compelling storage solutions that bring higher densities and produce a favorable cost/performance equation - our QLC technology falls squarely into that sweet spot. History has proven us right in the past when it comes to our visionary flash memory roadmap, and we fully expect QLC BiCS FLASH to continue our industry-leading track record."

Samples of Toshiba's groundbreaking QLC device began shipping earlier in June to SSD and SSD controller vendors for evaluation and development purposes. Additionally, samples will be showcased at the 2017 Flash Memory Summit, taking place from August 7-10 in Santa Clara, California.

View at TechPowerUp Main Site

 

[Nuckles56]

And now for the QLC SSDs with much less endurance and performance than their TLC or even MLC cousins in 3....2.....1

 

[Solid State Brain]

Write endurance for SSD-grade QLC memory (aka 4-bit MLC) could be in the ballpark of 200-250 program/erase cycles. This should not be a too big problem for terabyte-class consumer SSDs, but I'm wondering about performance.

 

[R0H1T]

Write endurance for SSD-grade QLC memory (aka 4-bit MLC) could be in the ballpark of 200-250 program/erase cycles. This should not be a too big problem for terabyte-class consumer SSDs, but I'm wondering about performance.

This is 3D NAND we're talking about, the endurance should be higher than that.

 

[Chaitanya]

And now for the QLC SSDs with much less endurance and performance than their TLC or even MLC cousins in 3....2.....1

when you have 4 bits of data on cell sure the read/write performance is going to take a hit. Although if it means they are going to larger fab node(90nm or larger) and cost of chips is low enough it can be useful in reducing the cost of flash based storage devices. I wouldnt mind having one of those in a usb flash drive to carry data around.

 

[Brusfantomet]

That is interesting, a TLC chip has 2^3 = 8 voltage levels to represent 3 bits, a QLV then has 2^4 = 16 voltage levels.

I would hazard a guess that the cips still run at the same voltage, therefore the room for error on the voltage levels decrease dramatically. where MLC maybe has 3000 P/E cycles a TLC migth have 1000, what will the level be for QLC? Significantly less than TLC is my guess, unless Toshiba has worked some special magic.

 

[Solid State Brain]

This is 3D NAND we're talking about, the endurance should be higher than that.

Last year there was a news about Toshiba's experimental 100TB QLC 3D NAND SSD; apparently they were targeting 150 P/E cycles.

http://www.tomshardware.com/news/qlc-nand-ssd-toshiba-facebook,32451.html
https://www.theregister.co.uk/2016/08/10/toshiba_100tb_qlc_ssd/

 

[Prima.Vera]

Toshiba. Probably the last and only innovating tech company in Japan. Too bad their TVs are not that popular/good(?), while their mobile phones pure junk...

 

[Duality92]

Their A19 NAND is still widely used, I think this will be an easy adoption if costs are not prohibitive. Also, as far as endurance goes, I think most SSDs (if not all) never meet their rating, they almost all end up surpassing it. With a more precise manufacturing process, I think they'll be good regardless of what the spec sheet says.

 

[Supercrit]

Nice to see that companies are actively researching and developing SSDs with worse endurance and performance as time goes on.

 

[newtekie1]

Nice to see that companies are actively researching and developing SSDs with worse endurance and performance as time goes on.

Endurance and performance are not where SSDs need improving right now. Capacity/$ is what needs improving. If that comes at the cost of minor endurance and performance penalties, most people will take it. It isn't like the average consumer can ever tell the difference between a SLC SSD and a TLC SSD.

 

[hojnikb]

Just fyi, this is not their first QLC flash memory. Sandisk (which shares it's fab with toshiba) had qlc sd card way back in 2009
https://www.sandisk.com/about/media...-4-bits-per-cell-(x4)-flash-memory-technology
https://www.sandisk.com/about/media...it-x4-(4-bits-per-cell)-nand-flash-technology

 

[Tomorrow]

Considering major teething issues TLC had when it came out i don't see QLC being viable before ~2020. When talking about TLC the only two TLC based SSDs i would trust to put on any of my computers are Samsung 850 EVO and 960 EVO. Other TLC based drives either have performance or consistency problems. Not something you want to have on your PC...

 

[hojnikb]

Considering major teething issues TLC had when it came out i don't see QLC being viable before ~2020. When talking about TLC the only two TLC based SSDs i would trust to put on any of my computers are Samsung 850 EVO and 960 EVO. Other TLC based drives either have performance or consistency problems. Not something you want to have on your PC...

With 3D nand, QLC shouldn't be that big of an issue, because the actual cell is much much larger than with 2D TLC, used in recent ssds.

 

[Valantar]

QLC will clearly not be for system drives or anything that sees regular rewrites (although my 256GB 840 Pro OS drive still has just 11.7TB of host writes, or 468 write cycles after ... oh, four years, almost), but it might spell a revolution in mass storage, especially with 64 and 96-layer chips (in 16-hi stacks?). Multi-TB SSDs for mass storage might finally be viable without costing 10x of a comparable HDD.

Not to mention that QLC can allow for some firmware ... creativity. MLC emulation should be as easy (as if anything like this is easy) as telling the controller to treat every 4 voltage states as one, with some light ECC to make sense of any (rare) edge cases. SLC emulation would be even easier. Heck, you could even emulate TLC, although that seems rather unnecessary. The thing is: with current SSD capacities and prices, pseudo-SLC caches don't make that much sense outside of the limited forms they have today. But for a 2TB+ QLC SSD? I'd gladly have the ability to set 1/4 of its capacity as a fixed 256GB MLC buffer. With some clever software, this could even be a flexible, multi-tier system where the whole drive starts out as SLC or MLC, but gradually transitions to QLC as it fills up. Again, I'd gladly buy a 2TB drive that performed like an MLC drive for the first 300GB or more, but still had the ability to adapt as it filled up. Or one where I could give up some capacity to gain a locked buffer. This ought to help out with endurance too (although the "host writes" number would become meaningless if it stays in non-QLC mode most of the time - might it require a tiered system of "QLC host writes" and so on?).

Oh, and stick some Optane/QuantX in there and ditch the DRAM buffer. 16GB would be sweet, but even 8GB would be pretty nice.