AMD Ryzen Threadripper TDP and Cache Sizes Confirmed

[btarunr]

AMD maybe have shaken up the HEDT (high-end desktop) processor market with three Ryzen Threadripper SKU announcements early this week; but the two specifications that eluded us were their rated TDP and cache amounts. The first Ryzen Threadripper models will be available in the market from the 10th of August, and will include the 12-core/24-thread 1920X and the flagship 16-core/32-thread 1950X. Both models will feature the full 32 MB of L3 cache available from a pair of 14 nm "Summit Ridge" dies, which work out to "total cache" (L2+L3) amounts of 38 MB for the 1920X and 40 MB for the 1950X. The TDP of the 1920X and 1950X is rated at 180W. The TDP and cache configuration of the 8-core/16-thread 1900X remains unknown, for now.



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[the54thvoid]

Those clocks are superb for that many cores. I'd love to see a review of the two 16 core parts from both camps up against each other at stock. How long we have to wait for that?

 

[Imsochobo]

Those clocks are superb for that many cores. I'd love to see a review of the two 16 core parts from both camps up against each other at stock. How long we have to wait for that?

unfortunately late this year probably because of intel is late
review of the 16core will be seen in a matter of a week
but these clocks are crazy for a 16core, and the infinity fabric designs rock

 

[bug]

Well, these are not into my price range anyway, but damn! PentiumD would like to have a word with those TDPs.

 

[HTC]

unfortunately late this year probably because of intel is late
review of the 16core will be seen in a matter of a week
but these clocks are crazy for a 16core, and the infinity fabric designs rock

But the infinity fabric is supposed to be the Aquilles heel of the Zen architecture ...

 

[the54thvoid]

But the infinity fabric is supposed to be the Aquilles heel of the Zen architecture ...

It scales with memory speed and latency.

 

[Deleted member 172152]

1920 3.2ghz 140W has been confirmed by x399 cpu support lists btw.

 

[bug]

But the infinity fabric is supposed to be the Aquilles heel of the Zen architecture ...

It's an engineering trade-off, yes. The best interconnect will never be as fast as a monolithic design. Yet the trick is to get enough benefits (flexible, cheaper design) to offset the downsides (mainly added latency).
Achilles' heel is too strong, it's a bottleneck that can be observed under some scenarios and that is completely irrelevant in many others.

 

[HTC]

It scales with memory speed and latency.

It's an engineering trade-off, yes. The best interconnect will never be as fast as a monolithic design. Yet the trick is to get enough benefits (flexible, cheaper design) to offset the downsides (mainly added latency).
Achilles' heel is too strong, it's a bottleneck that can be observed under some scenarios and that is completely irrelevant in many others.

It seems you both missed my sarcasm ...

Unless some new materials replace silicon, we'll soon be @ the limit and the only way is to improve core count, but that gets very very expensive with higher number of cores due to low yields. AMD realized this and came up with infinity fabric which solves the low yields problem because Zen chips are small enough to have very high yields, thus making high core count chips not only possible for a "cheap" price but also very scalable.

Remember: the same Zen chip is the main component of Ryzen / Threadripper offerings from 4 C / 4 T all the way to 32 C / 64 T, made possible by infinity fabric.

 

[bug]

It seems you both missed my sarcasm ...

Unless some new materials replace silicon, we'll soon be @ the limit and the only way is to improve core count, but that gets very very expensive with higher number of cores due to low yields. AMD realized this and came up with infinity fabric which solves the low yields problem because Zen chips are small enough to have very high yields, thus making high core count chips not only possible for a "cheap" price but also very scalable.

Remember: the same Zen chip is the main component of Ryzen / Threadripper offerings from 4 C / 4 T all the way to 32 C / 64 T, made possible by infinity fabric.

Well, when silicon miniaturization hits the wall, so does increasing the core count. IF seems to solve the yields problem for now, but it's not a magic bullet.

And yes, your sarcasm font wasn't very readable to me

 

[Liviu Cojocaru]

Meh...some lame chips glued together (just joking). I can't wait to see them at work. They are certainly some powerful beasts, I am particularly curios in the 1900X

 

[HTC]

Well, when silicon miniaturization hits the wall, so does increasing the core count. IF seems to solve the yields problem for now, but it's not a magic bullet.

And yes, your sarcasm font wasn't very readable to me

Will change my sarcasm font next time!

IF is not a magic bullet, as you call it, but it can delay the limit of what process shrinking + high core count can achieve. I wouldn't be surprised if we could have a 64 C / 128 T chip in like 5 years or so by using 7 nm FinFet (or smaller) as well as infinity fabric 2.0, or something along those lines. Making a silicon chip like that but monolithic should be impossible.

 

[ZoneDymo]

really would love to get that 1950x just for livestreaming, putting that CPU preset on "placebo" and compressing the Sh*t out of that footage >

 

[Effting]

But the infinity fabric is supposed to be the Aquilles heel of the Zen architecture ...

Nope, the infinity fabric is the main aspect of the arquitecuture that alowed AMD to do everthing they did with the Zen. It is even more important than the IPC and eficinncy increases, only because these were only possible due to the Infinity Fabric.

 

[HisDivineOrder]

really would love to get that 1950x just for livestreaming, putting that CPU preset on "placebo" and compressing the Sh*t out of that footage >

Ditto.

 

[Fx]

The TDP and cache configuration of the 1900X is exactly why I was excited to see this headline. :\

 

[OSdevr]

It's an engineering trade-off, yes. The best interconnect will never be as fast as a monolithic design. Yet the trick is to get enough benefits (flexible, cheaper design) to offset the downsides (mainly added latency).
Achilles' heel is too strong, it's a bottleneck that can be observed under some scenarios and that is completely irrelevant in many others.

There is still the 3D IC route. More expensive than separate dies on a PCB but cheaper (and nearly as fast as) a monolithic design.

 

[bug]

There is still the 3D IC route. More expensive than separate dies on a PCB but cheaper (and nearly as fast as) a monolithic design.

This is not a matter of surface/area, but rather of producing billions of transistors with zero defects. Whether they're planar or stacked is rather irrelevant (except that it's harder to build stacked transistors).

 

[OSdevr]

This is not a matter of surface/area, but rather of producing billions of transistors with zero defects. Whether they're planar or stacked is rather irrelevant (except that it's harder to build stacked transistors).

I was referring to the latency of infinity fabric. Using a silicon interposer would allow the dies to be much closer together. Xilinx has done this for several years with their top of the line FPGAs.

 

[bug]

I was referring to the latency of infinity fabric. Using a silicon interposer would allow the dies to be much closer together. Xilinx has done this for several years with their top of the line FPGAs.

Ok. I'm not sure FPGAs are as complex as a CPU, but at least there's a "tech demo" out there.

 

[XiGMAKiD]

really would love to get that 1950x just for livestreaming, putting that CPU preset on "placebo" and compressing the Sh*t out of that footage >

Now I'm actually curious about the result

 

[SKD007]

Those clocks are superb for that many cores. I'd love to see a review of the two 16 core parts from both camps up against each other at stock. How long we have to wait for that?

Ya you will see. But intel biased reviewers will run single core bench and games that use single thread performance to take advantage of intel turbo 3 to show intel is superior... lol until unless they run multi thread games and softwares to measure performance. It will just be waste of time.

 

[Frick]

Ya you will see. But intel biased reviewers will run single core bench and games that use single thread performance to take advantage of intel turbo 3 to show intel is superior... lol until unless they run multi thread games and softwares to measure performance. It will just be waste of time.

Not at all, at this point in time both are valid and important as there are many programs and games of both kind. That is why we have reviews. If anything it's hard to find benchable consumer software that actually scales well to that many threads. At least I imagine that is the case