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This is not a leak, just someone creating a table of guesses. This is certainly not anything from Intel.Here is a screen shot of a leaked table of potential Intel CPUs. This came out of China and there are spelling errors. 'cores/treads' the H got lost.
View attachment 93292
Core configurations are usually decided during tapeout, and clocks and model names closer to launch. Even Intel doesn't know yet what the models will look like.
And I like the socket names; old socket +10
![Stick Out Tongue :p :p](https://tpucdn.com/forums/data/assets/smilies/tongue-v1.gif)
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The source from Anandtech is actually quite an interesting read. It also provides some early indications on what Ice Lake will bring, both in terms of new AVX features and other instructions.
What I find most interesting is the "Fast Short REP MOV". Those of you with experience with assembly, knows a CPU spends a lot of cycles not only moving data from memory to CPU registers, but also shuffling around the registers to be able to execute the next ALU or FPU instruction. A single ALU/FPU operation may require up to 3-4 MOV operations. It may seem very wasteful to spend clock cycles just moving a few bits instead of spending them calculating stuff, so anything which helps reduce these "wasteful" operations will help throughput without increasing computational resources.
Additionally Cannon Lake will add support for SHA-NI, which brings acceleration of SHA and MD5. Surely this will bring like a 100× acceleration for such algorithms, but I'm a firm believer that algorithm-specific instructions don't belong in a general purpose CPU. Whether it's algorithms for cryptography or compression, these algorithms keep evolving making acceleration quickly outdated. SHA and MD5 are already outdated in cryptography, so these are surely added just to show some gains in some specific benchmarks for enterprise customers. For general purpose use, this acceleration is mostly a waste of die space and energy consumption. How much of your CPU time is really spent on AES, SHA, MD5, etc? Probably less than 1%, unless you run some kind of web server, which is why I believe these features belong in specialized processors for such workloads. Back in the 80s, Intel made specialized co-processors for math(8087, etc.), I think they should have used this approach for special enterprise features.
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