AMD to Cough Up $12.1 Million to Settle "Bulldozer" Core Count Class-Action Lawsuit

[FordGT90Concept]

You have yet to prove that.

Yes, I did. Many references provided. At no point until AMD pursued CMT was an integer cluster called a "core." It might be called an "execution core" but that's a huge distinction from a multiprocessor environment where core means independent processor.

We have to continue with this endless limbo but, when was it established and by who ?

Alan Turing and the Turing Machine which all CPUs mimic.

 

[Vya Domus]

Alan Turing and the Turing Machine which all CPUs mimic.

That's funny, but we both know you have zero answers for the questions that I posed. I didn't expected that you'd be able to address them anyway, thanks.

 

[FordGT90Concept]

I posed this question many times but I never got a definitive answer, are you telling me that the authors of the conjoined cores paper mislabeled the subject of their research ?

Here's the paper:

https://www.microarch.org/micro37/papers/18_Kumar-Conjoined-Core.pdf

Look at the title: "Conjoined-core Chip Multiprocessing"

If AMD put that on their box this suit wouldn't have happened.

Were cores such as AMD's the norm ?

Hell no, paper was published in 2004. There's no record of the idea before that.

AMD's first dual-core debuted in 2005 and so did Intel's. Bulldozer is the only commercial conjoined-core chip to be sold and it didn't debut until 2011.

 

[Vya Domus]

If AMD put that on their box this suit wouldn't have happened.

Maybe, they'd still be cores though.

The usage of the shared resource can be based on a policy decided either statically, such that it can be accessed only during fixed cycles by a certain core, or the accesses can be determined based on certain dynamic conditions visible to both cores (given adequate propagation time).

Certain core, both cores. Hmm, almost as if there is more than one core. But what do these researchers know with their years of academic experience, us forum dwellers have it figured it out.

 

[FordGT90Concept]

Execution cores, not multi-processor cores. This distinction occurred simultaneously by AMD and Intel in 2005, a year after that technical paper was published.

If the authors were to revise their paper today, they'd be more careful about broadness they use the word "core" to describe things. On page two, they actually contradict themselves:

Both the studies conclude that the hybrid design, a chip multiprocessor where the individual cores are SMT, represents a good performance-complexity design point. They do not share resources between cores, however.

First instance of core describes a multiprocessor "core" where the second instance describes execution "core." CMT shares multiprocessor "core" resources but not execution "cores." Paper is confusing AF because they use multiple definitions of "core" interchangeably.

 

[Vya Domus]

Execution cores, not multi-processor cores.

A core is a core, there was never made a distinction in this regard because we'd open another can of worms. But it doesn't even matter.

A processor contains cores -> multiple cores -> multi-processor cores. An execution cores as you want to call it, is still a core alright.

 

[NC37]

Ridiculous.

1) Meritless suit.

2) Only covers California purchases.

3) Doesn't even cover all of the 8 core consumer-grade FX chips.

Because Cali is the only state where a suit like this could succeed. The fact that it only covered so few means AMD got off real easy.

 

[FordGT90Concept]

Oh look, they did it again:

Conjoined-core chip multiprocessing deviates from a conventional chip multiprocessor design by sharing selected hardware structures between adjacent cores to improve processor efficiency.

First is multiprocessor core, second is execution core.

A processor contains cores -> multiple cores -> multi-processor cores. An execution cores as you want to call it, is still a core alright.

Negatory. Execution cores lack the ability to manage memory and logic. They're glorified calculators. When Athlon 64 X2 and Pentium D on the market, they didn't market them as dual-core as in dual-glorified-calculators, they marketed them as dual-core, as in dual-processor, which is a statement of demonstrable fact (in marketing, in performance, and in design). Further, in operating systems, this change was marked by the driver changing from "uniprocessor" to "multiprocessor."

A modern uniprocessor driver can drive both threads of Bulldozer with no degradation in performance...just like Pentium 4 w/ HT or Zen with one core enabled.

 

[Vya Domus]

Oh look, they did it again:

First is multiprocessor core, second is execution core.


Negatory. Execution cores lack the ability to manage memory and logic. They're glorified calculators. When Athlon 64 X2 and Pentium D on the market, they didn't market them as dual-core as in dual glorified calculators, they marketed them as dual core, as in dual processor, which is a statement of demonstrable fact.

Correct me if I am wrong, was this distinction ever made in this case that was filed against AMD ?

 

[FordGT90Concept]

Yes, it was literally the entire point of the lawsuit.

https://regmedia.co.uk/2019/01/22/amd-core-class-action.pdf

Plaintiffs argue in their complaint that Defendant's Bulldozer products do not contain eight
“cores” as claimed and advertised. Id. ¶ 8. According to Plaintiffs, a “core” is a processing unit
that is able to operate (e.g., perform calculations and execute instructions) independent from other
cores positioned on a chip. Id. ¶ 23–24.

AMD made no attempt in marketing to explain to the public that "8-core" in their branding is "8-execution core." Lie by omission; false advertising.

 

[Vya Domus]

Yes, it was literally the entire point of the lawsuit.

https://regmedia.co.uk/2019/01/22/amd-core-class-action.pdf

AMD made no attempt in marketing to explain to the public that "8-core" in their branding is "8-execution core." Lie by omission; false advertising.

This stipulation literally does not exist. I recommend going over the text again, there isn't a single instance where they make the distinction between an execution core and a multiprocessor core. And don't try to say this is supposed to be implied, it's not.

A "core that is able to operate independent from other cores". Sorry, that's not it, an execution core can also operate independently from other execution cores.

 

[FordGT90Concept]

This stipulation literally does not exist. I recommend going over the text again, there isn't a single instance where they make the distinction between an execution core and a multiprocessor core. And don't try to say this is supposed to be implied, it's not.

They don't have to because of Pentium D, Athlon 64 X2, Athlon X2, Core 2 Duo, Core 2 Quad, Core I#, Phenom X4, etc. Every single one of theses processors were marketed as "x core" which meant multiprocessor core ("core replication is obvious"). It wasn't a problem until AMD decided to be dishonest and go back to describing a core as an execution core; hence, the lawsuit.

Bulldozer was the exception, not the rule. The rule is what the public understands it to be.

A "core that is able to operate independent from other cores". Sorry, that's not it, an execution core can also operate independently from other execution cores.

Except that AMD itself disagreed with that assessment when it launched Athlon 64 X2: the "cores" were multiprocessor and independent.

AMD can't redefine the word to its advantage: it must be truthful in advertising.

 

[seronx]

Sorry, that's not it, an execution core can also operate independently from other execution cores.

Even with shared resources...

Core replication is obvious it checks out, boys lets pack up and go home. Sixteen independent cores in this processor.

 

[FordGT90Concept]

And what are those diagrams of? Without extra context, I'd say that's a quad-core, 16-thread chip.

 

[seronx]

Sun's unreleased 16-core processor called "Rock".
//
This design enables resource sharing among cores within a cluster, thus reducing the area requirements. All cores in a cluster share an instruction fetch unit (IFU) that includes the level-one (L1) instruction cache. We decided that all four cores in a cluster should share the IFU because it is relatively simple to fetch a large number of instructions per cycle. Thus, four cores can share one IFU in a round-robin fashion while maintaining full fetch bandwidth. Furthermore, the shared instruction cache enables constructive sharing of common code, as is encountered in shared libraries and operating system routines.

Each core cluster contains two L1 data caches (D cache) and two floating-point units (FGU), each of which is shared by a pair of cores, these structures are relatively large, so sharing them provides significant area savings.
//
Shailender Chaudhry, Robert Cypher, Magnus Ekman, Martin Karlsson, Anders Landin, Sherman Yip, Hakan Zeffer, Marc Tremblay - Sun Microsystems
ROCK, SUN’S THIRD-GENERATION CHIP-MULTITHREADING PROCESSOR, CONTAINS 16 HIGH-PERFORMANCE CORES

 

[Vya Domus]

They don't have to

No, they totally have to. "Core" is not enough if you want to make a distinction between a core of some king and another, as you so adamantly want to prove. You don't file lawsuit because about obscure stuff such as this and say that you need to stipulate the one thing that would make your point clear.

Your distinction has nothing to do with what is written in this filling because that was never meant to be part their argument, they simply never went that far.

Their only point was about cores being "independent", if you read carefully they never actually directly bring into question what is supposed to be a core, just that they believe it has to be an "independent processing unit". Good luck with equating that to anything, there is an endless list of ICs that fit that description.

And on that note, I'll repeat myself, execution cores are independent.

 

[FordGT90Concept]

Sun's unreleased 16-core processor called "Rock".
//
This design enables resource sharing among cores within a cluster, thus reducing the area requirements. All cores in a cluster share an instruction fetch unit (IFU) that includes the level-one (L1) instruction cache. We decided that all four cores in a cluster should share the IFU because it is relatively simple to fetch a large number of instructions per cycle. Thus, four cores can share one IFU in a round-robin fashion while maintaining full fetch bandwidth. Furthermore, the shared instruction cache enables constructive sharing of common code, as is encountered in shared libraries and operating system routines.

Each core cluster contains two L1 data caches (D cache) and two floating-point units (FGU), each of which is shared by a pair of cores, these structures are relatively large, so sharing them provides significant area savings.
//

So yeah, a quad-core, 16-thread chip. Has four multi-processor cores and 16 execution cores.

And on that note, I'll repeat myself, execution cores are independent.

They're not processors.


Multi-processor cores don't share anything except memory.

 

[seronx]

So yeah, a quad-core, 16-thread chip. Has four multi-processor cores and 16 execution cores.

"Each Rock processor has 16 cores, each configurable to run one or two threads; thus, each chip can run up to 32 threads. The 16 cores are divided into core clusters, with four cores per cluster. This design enables resource sharing among cores within a cluster, thus reducing the area requirements."

Gotcha again.

 

[Vya Domus]

They're not processors.

It must be tiring moving that goal post every time.

This is about cores, not processors.

 

[seronx]

Multi-processor cores don't share anything except memory.

They share a glue, that is pretty slow and inconsistent some might say.

Dual-core communicating through the SRI => glue-interconnect
Dual-core communicating through cache unit => no glue

 

[FordGT90Concept]

"Each Rock processor has 16 cores, each configurable to run one or two threads; thus, each chip can run up to 32 threads. The 16 cores are divided into core clusters, with four cores per cluster. This design enables resource sharing among cores within a cluster, thus reducing the area requirements."

Gotcha again.

Not really, I wasn't aware that the CMT execution cores were also SMT. Doesn't change anything other than the thread count.

Execution cores are sharing FGUs and instruction decoders. Multiprocessor cores share nothing; ergo, my statement is correct: it's a quad-core processor. "Core replication is obvious." A quad-core is obvious in that diagram, each having a dedicated L2.

It must be tiring moving that goal post every time.

This is about cores, not processors.

Define "core." I'm spelling it out because people like to call two different things a "core" when they're very different things (honestly, everyone in this thread should know better by now). To be very blunt: "core" to the public is synonymous with "multiprocessor core." If you're referring to the other kind of core (the very technical component of a processor which executes instructions), it must be clarified as, for example, an "integer cluster" or an "execution core." "Core" since 2005, has never referred to "execution core" unless pretext gives it that context. AMD didn't on their marketing materials.

 

[Vya Domus]

Define "core."

Sure, I'll repost the definition that I found a couple of pages ago, maybe you missed it :

■ Core: An individual processing unit on a processor chip. A core may be equivalent in functionality to a CPU on a single-CPU system. Other specialized processing units, such as one optimized for vector and matrix operations, are also referred to as cores.

Found in this book : Computer Organization and Architecture Designing for Performance Tenth Edition, William Stallings

"may be equivalent"

May not, execution cores classify as cores too according to this definition and dependencies are not even brought into question.

I'm spelling it out because people like to call two different things a "core" when they're very different things

And one of them is wrong in assuming that core must meant what you're saying it means. Or what this lawsuit says it means.

 

[FordGT90Concept]

That's funny because I found the 8th edition which was published in 2010, before Bulldozer released:

https://inspirit.net.in/books/academic/Computer%20Organisation%20and%20Architecture%208e%20by%20William%20Stallings.pdf

On page 18:

Multicore processors: The eighth edition now includes coverage of what has become the most prevalent new development in computer architecture: the use of multiple processors on a single chip. Chapter 18 is devoted to this topic.

They literally added a chapter describing multicore processors. Chapter 18 starts on PDF 707 which contradicts the 10th edition:

A multicore computer,also known as a chip multiprocessor,combines two or more processors (called cores) on a single piece of silicon (called a die).Typically, each core consists of all of the components of an independent processor,such as registers, ALU, pipeline hardware, and control unit, plus L1 instruction and data caches. In addition to the multiple cores,contemporary multicore chips also include L2 cache and,in some cases,L3 cache.

In other words, the author, William Stallings, redefined "core" himself to accommodate AMD's lie. I don't know what year the 10th edition was published but I guarantee you it is after Bulldozer debuted in 2011. This is an inconsistent/poor source.

 

[Vya Domus]

In other words, the author, William Stallings, redefined "core" himself to accommodate AMD's lie.

We are getting into conspiracy territory and it does not bode well if you want to look believable.

Why are you assuming he was accommodating AMD's lie and not that he was accommodating an archaic definition for a more modern and relevant one instead ?

This is an inconsistent/poor source.

It sure as hell is better than none, I didn't write any book on the subject and neither did you, few tried to classify these things, unsurprisingly.

But let's go to the extremes, check out flynn's taxonomy which dates back into the 60s. He classifies units such as SISD, SIMD as being a type of "computer" and "processing units", not quite cores because that wasn't even a thing back then but it sure gives you something to think about.

You're trying very hard to split the term core into something that bears multiple meanings and claim that only one is correct.

It's not my fault the lawsuit was formulated in the worst possible way from this perspective. If they made it clear that they believed AMD was trying to market one kind of core as something else or that one certain type of core was counted in a incorrect manner, yes I would have agreed to you but they didn't. They just said AMD lied about having "independent processing unit", as I said, a million things match that description.

AMD's Bulldozer architecture has, at the very least 8 independent cores/processing units.

 

[FordGT90Concept]

Why are you assuming he was accommodating AMD's lie and not that he was accommodating an archaic definition for a more modern and relevant one instead ?

There was 5 years of precedent leading up to the writing of the 8th that is additionally consistent with decades of writing on the subject before that and is still consistent with the definition of "core" = "multicore processor" today which AMD agreed to settle with.

I really don't see the purpose of continuing this. Your own sources turned against you.