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With its "Skylake" microarchitecture, Intel significantly re-balanced the cache hierarchy of its HEDT and enterprise multi-core processors to equip CPU cores with larger amounts of faster L2 caches, and lesser amounts on slower shared L3 cache. The company retained its traditional cache balance for its mobile and desktop processor derivatives. This could change with the company's "Tiger Lake" microarchitecture, particularly the "Willow Cove" CPU cores they use, according to a Geekbench online database listing for a prototype quad-core "Tiger Lake-Y" mobile processor.
According to this listing, assuming Geekbench is reading the platform correctly; the "Tiger Lake-Y" processor features a 4-core/8-thread CPU, with a massive 1,280 KB (1.25 MB) of L2 cache per core, and 12 MB of L3 cache. Intel also enlarged the L1D (data) cache to be 48 KB in size, while the L1I (instruction) cache remains 32 KB. This amounts to a 400% increase in L2 cache size, and a 50% increase in L3 cache size. Unlike with "Skylake-X," the increase in L2 cache size doesn't come with a decrease in shared L3 cache size (per core). The "Tiger Lake-Y" processor is being tested on a "Corktown" prototyping platform (a specialized motherboard that has all possible I/O connectivity available with the platform, for testing. "Tiger Lake" is expected to make its debut some time in 2020-21 as a successor to "Ice Lake," and will be built on Intel's refined 10 nm++ silicon fabrication node. Find the Geekbench entry in the source link below.
View at TechPowerUp Main Site
According to this listing, assuming Geekbench is reading the platform correctly; the "Tiger Lake-Y" processor features a 4-core/8-thread CPU, with a massive 1,280 KB (1.25 MB) of L2 cache per core, and 12 MB of L3 cache. Intel also enlarged the L1D (data) cache to be 48 KB in size, while the L1I (instruction) cache remains 32 KB. This amounts to a 400% increase in L2 cache size, and a 50% increase in L3 cache size. Unlike with "Skylake-X," the increase in L2 cache size doesn't come with a decrease in shared L3 cache size (per core). The "Tiger Lake-Y" processor is being tested on a "Corktown" prototyping platform (a specialized motherboard that has all possible I/O connectivity available with the platform, for testing. "Tiger Lake" is expected to make its debut some time in 2020-21 as a successor to "Ice Lake," and will be built on Intel's refined 10 nm++ silicon fabrication node. Find the Geekbench entry in the source link below.
View at TechPowerUp Main Site