TSMC on Track to Deliver 3 nm in 2022

[Vayra86]

It's the Pacific Rim, why rule out earthquakes?
But the news is about TSMC being where they wanted to be now, not in 2022 or any year in between.

Yes, the article reads a lot like Intel's 10nm 'going according to plan', you're correct about that. Where did I read such things before? Oh yeah, every shrink since 22nm

But you're right, earthquakes, and let's not forget climate change either.

 

[InVasMani]

the occasional fire, made me laugh. that flood in Thailand that hurt the Hard Drive market for a solid 3-5 years... hope it doesn't happen again

Let's just blame that one on global warming too along with Noah's Ark that sh*t was defiantly caused by global warming according to climate scientists with huge government backed grant money.

 

[ppn]

Thing with that is, there are multiple processes in the 7nm family. A low-power process that usually gets used for SoCs and whatnot that actually clocks in close to or at that 90 Mtr/mm^2 and a high performance variation that gets half of the density but clocks a lot higher..

Yes 91 is for low power and 65 high performance. But still 41 found in 5700XT is unexpectedly low. What does it mean for the future, that we get only 60% improvement 14 to 7nm. and now 3nm another 60%, and thats it.

 

[Space Lynx]

Let's just blame that one on global warming too along with Noah's Ark that sh*t was defiantly caused by global warming according to climate scientists with huge government backed grant money.

no one is blaming anything... we simply said something that happened and caused prices of hard drives to go up... so.... ok...

 

[TheGuruStud]

Better scrap 7nm, Intel, and go straight to 5 lol

I recall GloFo was right on track or better with 7nm, right up to the point when it wasn't.

Let's see how 5nm rolls out in 2021.

Glofo 7nm is fine. They're broke and can't upgrade tooling with the smaller profits it would bring for them. The decision was to cut their losses.

 

[qcmadness]

Yes 91 is for low power and 65 high performance. But still 41 found in 5700XT is unexpectedly low. What does it mean for the future, that we get only 60% improvement 14 to 7nm. and now 3nm another 60%, and thats it.

Because memory controller cannot be scaled

 

[Tartaros]

the occasional fire, made me laugh. that flood in Thailand that hurt the Hard Drive market for a solid 3-5 years... hope it doesn't happen again

But then we won't have any other thread with us making a chain of jokes with "because x happened, the nand price went up n quantity". That shit was good.

 

[bug]

Better scrap 7nm, Intel, and go straight to 5 lol



Glofo 7nm is fine. They're broke and can't upgrade tooling with the smaller profits it would bring for them. The decision was to cut their losses.

What do you mean "small profits"? 7 nm still carries a high-enough price premium over 1X nm. There's a ton of mobile SoCs out there that would love to be made using 7 nm.

 

[TheGuruStud]

What do you mean "small profits"? 7 nm still carries a high-enough price premium over 1X nm. There's a ton of mobile SoCs out there that would love to be made using 7 nm.

It's more expensive to produce, yields will be far less than their 14nm for a quite a while and they were pretty far behind tsmc time-wise. Also, BROKE. So, who is going to fill all those orders with it being 1 yr behind tsmc and make enough money to then move to 5nm immediately? They couldn't.

Intel is going to find out the same way in a few years.

 

[Vayra86]

Let's just blame that one on global warming too along with Noah's Ark that sh*t was defiantly caused by global warming according to climate scientists with huge government backed grant money.

Is there something lost in translation here or did my comments just go way over your head? Lol

 

[WikiFM]

Because memory controller cannot be scaled

By AMD. Intel and all the other companies sub 12nm mobile SoCs have scaled down.

 

[semantics]

Better scrap 7nm, Intel, and go straight to 5 lol



Glofo 7nm is fine. They're broke and can't upgrade tooling with the smaller profits it would bring for them. The decision was to cut their losses.

With how intel names things intel's 5nm node would probably mean that it's similar to tsmc's 3nm process. If anything intel can just change how they name things to fit more closely with glo flo/tsmc and samsung and people will claim they've made huge progress.

 

[InVasMani]

Is there something lost in translation here or did my comments just go way over your head? Lol

Too much space dust couldn't quite understand the scarcasm over the dark web of the internet lots of alien pron tentacles.

 

[WikiFM]

TSMC promised 2x higher logic density from 16nm to 10nm and 1.6x from 10nm to 7nm. If we use Apple as example we see kind of fulfillment.

A10	16nm	3.3B	125 mm2	26.4 Mt/mm2	Density
A11	10nm	4.3B	87.6mm2	49.1 Mt/mm2	1.86x
A12	7nm	6.9B	83.3mm2	82.8 Mt/mm2	1.67x

But from 7nm to 6nm just 1.18x, even if TSMC keeps releasing new nodes the improvement between one and the next is every time lesser.

 

[bug]

Is there something lost in translation here or did my comments just go way over your head? Lol

Neah, that never happens on Internet forums

 

[InVasMani]

Neah, that never happens on Internet forums

I was just being sarcastic people just missed it entirely. That never happens on forums.

 

[bug]

I was just being sarcastic people just missed it entirely. That never happens on forums.

I would know, I also have a thing for sarcasm, too and I know how poorly that conveys over the Internet

 

[InVasMani]

It can't be helped hipsters don't understand sarcasm.

 

[Vayra86]

It can't be helped hipsters don't understand sarcasm.

But... you already responded to sarcasm, with a touch of cynism. Re reading it I gotcha now On first glance it looked like you were actually serious... go figure, must be a sign of the times

Hipsters. Definitely *performs Fortnite dance*

(/s)

 

[ppn]

TSMC promised 2x higher logic density from 16nm to 10nm and 1.6x from 10nm to 7nm. If we use Apple as example we see kind of fulfillment.

A10	16nm	3.3B	125 mm2	26.4 Mt/mm2	Density
A11	10nm	4.3B	87.6mm2	49.1 Mt/mm2	1.86x
A12	7nm	6.9B	83.3mm2	82.8 Mt/mm2	1.67x

But from 7nm to 6nm just 1.18x, even if TSMC keeps releasing new nodes the improvement between one and the next is every time lesser.

Yeah but 7nm to 5nm is 1,88, and 6 to 5 1,59x, 5 to 3 - 1,50x. Polaris 24,6 Mtr on 16nm and navi 41,4 Mtr on 7nm scaled alot worse than a10 - 26,4 Mtr and a12 82,8 Mtr. So whatever is possible for a13 cuts in half 171 for navi successor, or around 80. Gpus will not only get 3nm 1 year later but will provide 5nm densities.

 

[WikiFM]

Yeah but 7nm to 5nm is 1,88, and 6 to 5 1,59x, 5 to 3 - 1,50x. Polaris 24,6 Mtr on 16nm and navi 41,4 Mtr on 7nm scaled alot worse than a10 - 26,4 Mtr and a12 82,8 Mtr. So whatever is possible for a13 cuts in half 171 for navi successor, or around 80. Gpus will not only get 3nm 1 year later but will provide 5nm densities.

First, 5nm and 3nm haven't been released yet so final products metrics could vary a lot. Second, Polaris was on 14nm by GloFo. Third, A13 still uses 7nm as A12. We should wait and see how Nvidia does with Samsung's 7nm, usually they tend to have cleaner designs.

 

[renz496]

TSMC already proven themselves with 7nm. I am sure they will successfully come out with 5nm and 3nm all in time for future RDNA & ZEN releases.

just because they were successful on one node then the next will also be fine. we have seen this for years now when it comes to TSMC.

 

[bug]

just because they were successful on one node then the next will also be fine. we have seen this for years now when it comes to TSMC.

Plus, there's this thing where there's no one team responsible for all nodes. Whoever worked on 7nm will not be working on 5nm, but on 3nm instead. 5nm is already being worked on by the team that did 14nm. That's how things are usually set up in this industry.
Somewhat unrelated, but it's also what will most likely make weird for Intel, when their 7nm node will be ready shortly after they figure out 10nm.

And it's going to be a blast about 5 years from now when everybody hits the physical limits of Si and we all get stuck on 2 or 3nm, while fabs shrink various parts of the transistor. If you think 14nm+++++ was embarrassing, just wait for 3nm++++++++++++++

 

[Minus Infinity]

A mere 3nm is around the size of a single molecule.

The end-of-the-line for silicon is near.

I can recall research papers from the late 90’s early 2000’s talking about how quantum effects were going to cause huge issues such as current leakage due to electron quantum tunneling between line traces etc. They were saying things would be bad from 10nm. It’s amazing to see us now talking about 3nm (although are the line traces actually 3nm) and apparently they have overcome all the issues. I know earlier on hi-K dielectrics helped a lot but I haven’t kept up with the tech and would love to know how they are getting 3nm to work and get high yields and mitigate huge quantum effects.

We can’t go much smaller AFAIK at least with silicon, but it’s lasted longer than anticipated. What’s on the horizon and how do you overcome hard quantum limits. The process can’t get arbitrarily small, atoms are about 0.1nm for the the simplest ones. Imagine line traces so small only a single electron at a time can pass, but they could never be made that small.

 

[RealNeil]

It's the Pacific Rim, why rule out earthquakes?

The Ring Of Fire.

Also, Tencent called and said that Fiftycent is stealing their lunch ever day at school.