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Processor | Ryzen 7800X3D |
---|---|
Motherboard | ROG STRIX B650E-F GAMING WIFI |
Memory | 2x16GB G.Skill Flare X5 DDR5-6000 CL36 (F5-6000J3636F16GX2-FX5) |
Video Card(s) | INNO3D GeForce RTX™ 4070 Ti SUPER TWIN X2 |
Storage | 2TB Samsung 980 PRO, 4TB WD Black SN850X |
Display(s) | 42" LG C2 OLED, 27" ASUS PG279Q |
Case | Thermaltake Core P5 |
Power Supply | Fractal Design Ion+ Platinum 760W |
Mouse | Corsair Dark Core RGB Pro SE |
Keyboard | Corsair K100 RGB |
VR HMD | HTC Vive Cosmos |
No. Remember that this is a packaging thing. You can use it to route any traces or connection over it. For example, AMD could route IF over EMIB faster and more power efficiently than current CPU packaging. TSMC is developing similar solutions so that might/will come to pass at one point.was that developed for core+vega apus only ? seems wasteful.
It is likely that APUs with Vega were a kind of mass-production test of sorts. In these APUS, EMIB was used for GPU-HBM connection, meaning connecting the very wide memory bus from GPU to HBM without having a full interposer.