Intel Alder Lake Processor Tested, Big Cores Ramp Up to 3 GHz

[AnarchoPrimitiv]

The real question is whether it'll be able to compete with Zen4 which early leaks claim OVER a 25%+ IPC gain (on early engineering samples there are 29% performance increases with the same amount of cores and clocks), increased efficiency due to 5nm process and 5ghz+ frequencies, again, due to the 5nm process, equating to a 40%+ performance increase overall, which is very impressive ... I tend to believe the early leaks since the early leaks on Zen3 all came out to be true... I mean, a 5nm, 5.1Ghz CPU with 25%+ IPC gains over Zen3 will be stiff competition... Anyone else blown away by the fact that AMD will deliver a 45%+ IPC increase in just two generations with a fraction of Intel's budget?

 

[Wirko]

The real question is whether it'll be able to compete with Zen4 which early leaks claim OVER a 25%+ IPC gain (on early engineering samples there are 29% performance increases with the same amount of cores and clocks), increased efficiency due to 5nm process and 5ghz+ frequencies, again, due to the 5nm process, equating to a 40%+ performance increase overall, which is very impressive ... I tend to believe the early leaks since the early leaks on Zen3 all came out to be true... I mean, a 5nm, 5.1Ghz CPU with 25%+ IPC gains over Zen3 will be stiff competition... Anyone else blown away by the fact that AMD will deliver a 45%+ IPC increase in just two generations with a fraction of Intel's budget?

Yes. His name is John S. Calper, and he's just begun raising funds for buying some Zen 4.

(Apart from that, I love the fast progression from "early leaks claim" to "the fact".)

 

[yotano211]

Based on the fact a 2080 GPU was used in testing, it's easy to extrapolate that the 3 series gpu's were unavailable.

It was available but it existed through the back loading doors in somebody's bag.

 

[Patriot]

Yes. His name is John S. Calper, and he's just begun raising funds for buying some Zen 4.

(Apart from that, I love the fast progression from "early leaks claim" to "the fact".)

I have no doubt Zen 4 will be a large uplift with ddr5, however, Zen3+ comes first... Alder lake vs Zen 3+ then Zen4 6mo later++
Intel has a chance here for frankenzilla to work.

 

[Darmok N Jalad]

I wonder if the boost frequency just isn’t reporting because the CPU isn’t registered. An i5-9700 has a base clock of 3.0GHz, but it boosts to 4.7GHz. I find it hard to believe that Intel could find that much IPC in one generation. If it was, they would be talking it up pretty substantially.

 

[R0H1T]

3 GHz

 

[Wirko]

later++

Sir, you have just invented a new and very important English word, which I'm sure will be included in computing-related dictionaries.

 

[bug]

I have no doubt Zen 4 will be a large uplift with ddr5, however, Zen3+ comes first... Alder lake vs Zen 3+ then Zen4 6mo later++
Intel has a chance here for frankenzilla to work.

There is no Zen3+ in the works that I know of. The same as there was no Zen2+.
So yes Alder Lake will go against Zen4. However, I expect Alder Lake to be Intel's original Zen: good, but ultimately a basis for further improvements.

 

[r9]

Imagine that, intel GLUING CPUs together...

My my...

Not the same ... as they use Super glue.

 

[Wirko]

Not the same ... as they use Super glue.

Blue Glue

 

[r9]

Blue Glue

See I was right it was different glue which is perfectly fine.

 

[R0H1T]

There is no Zen3+ in the works that I know of.

There is, probably on 6nm. Of course probably being the key word here, just to clarify it'll likely not have any uarch changes.

 

[Wirko]

There is, probably on 6nm. Of course probably being the key word here, just to clarify it'll likely not have any uarch changes.

The existence of Zen 3+ is just a wild guess at this point. Nevertheless, it's plausible: AMD hardly has enough engineers to bring the big bunch of novelties to market all at once. New process, new microarchitecture, new socket, new memory controller, new PCI version, and not too many bugs along with all that. So why not make Zen 3 on AM5 the first stage of a two-stage launch.
"6nm", with scare quotes bigger than usual, is also likely. TSMC N6 process has design rules compatible with N7, in order to enable simple porting.

 

[Aquinus]

The big thing that I notice from this is the size of the caches when comparing it to the 9880h in my laptop. L1d is 50% bigger (48KB vs 32KB), the L2 cache is 25% bigger (2.5MB vs 2MB) and is shared between 4 cores each compared to one smaller cache per core, and L3 is almost twice as big (30MB vs 16MB) and is shared between all cores, not per core.

 

[TheoneandonlyMrK]

Soo this next CPU is great because we got this GPU score on a totes ball's and useless benchmark, noice.

And we got 111.1% pciex4 performance the other day .

All from the real use case company who doesn't like useless benchmark tests.

I hope someone is handing out wake the f up slaps out at Intel right now.

 

[Aquinus]

Soo this next CPU is great because we got this GPU score on a totes ball's and useless benchmark, noice.

And we got 111.1% pciex4 performance the other day .

All from the real use case company who doesn't like useless benchmark tests.

I hope someone is handing out wake the f up slaps out at Intel right now.

I wouldn't call this official news from Intel. It's just a submission on GeekBench that somebody found.

 

[TheoneandonlyMrK]

I wouldn't call this official news from Intel. It's just a submission on GeekBench that somebody found.

Fair enough, probably should have noticed that, not the most helpful bench to run that it tells us little.