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- Sep 3, 2019
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System Name | PC on since Aug 2019, 1st CPU R5 3600 + ASUS ROG RX580 8GB >> MSI Gaming X RX5700XT (Jan 2020) |
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Processor | Ryzen 9 5900X (July 2022), 160W PPT limit, 80C temp limit, CO -9~14 |
Motherboard | Gigabyte X570 Aorus Pro (Rev1.0), BIOS F37h, AGESA V2 1.2.0.B |
Cooling | Arctic Liquid Freezer II 420mm Rev7 (Jan 2024) with off center mount for Ryzen, TIM: Kryonaut |
Memory | 2x16GB G.Skill Trident Z Neo GTZN (July 2022) 3600MT/s 1.39V CL16-16-16-16-32-48 1T, tRFC:280, B-die |
Video Card(s) | Sapphire Nitro+ RX 7900XTX (Dec 2023) 314~466W (366W current) PowerLimit, 1060mV, Adrenalin v24.7.1 |
Storage | Samsung NVMe: 980Pro 1TB(OS 2022), 970Pro 512GB(2019) / SATA-III: 850Pro 1TB(2015) 860Evo 1TB(2020) |
Display(s) | Dell Alienware AW3423DW 34" QD-OLED curved (1800R), 3440x1440 144Hz (max 175Hz) HDR400/1000, VRR on |
Case | None... naked on desk |
Audio Device(s) | Astro A50 headset |
Power Supply | Corsair HX750i, 80+ Platinum, 93% (250~700W), modular, single/dual rail (switch) |
Mouse | Logitech MX Master (Gen1) |
Keyboard | Logitech G15 (Gen2) w/ LCDSirReal applet |
Software | Windows 11 Home 64bit (v23H2, OSBuild 22631.4037), upgraded from Win10 to Win11 on Feb 2024 |
1. Yes the effective clock shows the sustainability of the boost/clock. In other words, the true(er) speed of a core.1. You should run a benchmark or check the effective clock frequencies to compare. Just a theory, but it's possible you will get a slight degradation in performance if the cpu tries to boost higher, uses more power, and then lowers the effective clocks as a result. If that happens it is likely only a small effect though.
2. This is something I have been wondering about. There was another post somewhere saying this was actually enabled in Zen3, but I don't know if that was just speculation or not. Assuming there is no documentation or other statement from AMD that they have enabled individual core voltages on desktop then I'll continue to assume all cores run off a single voltage.
3. One thing I realized, if the cpu has voltage regulators on die, then are the seemingly high (1.4-1.5) voltages what is actually seen by the cores? It would explain a lot to me if the cpu voltage we are seeing is actually the supply to onboard voltage regulators and not the actual voltage that the cores run at.
4. There's multiple things at play here, but the short answer is that it is not pointless to optimize on a per-core bases. At least if you want to get the last few % and as far as my understanding goes:
_1. -5 on your best core might actually result in the same VID as -30 on your worst core, since each core has a different voltage curve set from the factory (and curve offset is setting an offset to the factory default).
_2. Core VID in HWInfo is the voltage requested by that core. The actual voltage is going to be different to that, and assuming there is only a single voltage set for all cores it will be based on the highest voltage requested among the cores and possibly other parts of the die.
_3. For a multi-core load the voltage will be set based on the highest voltage requested among the active cores. You can focus on those cores when tuning curve offset to save time, but you need to figure out which ones they really are first.
5. Also note that by default HWInfo will report the same VID for all cores, but will read out sensor/register values sequentially, so in your screenshot you might just be seeing the VID changing between the time it read the value for Core 0 and Core 1. There is a setting that was added in HWiNFO v6.40 which seems to fix this. If you enable this I'd expect that you will see a slightly different VID for each core:
- Added Snapshot Polling mode for AMD Zen-based CPUs.
FEATURE - Effective clock vs instant (discrete) clock
It has become a common practice for several years to report instant (discrete) clock values for CPUs. This method is based on knowledge of the actual bus clock (BCLK) and sampling of core ratios at specific time points. The resulting clock is then a simple result of ratio * BCLK. Such approach...
![www.hwinfo.com](/forums/proxy.php?image=https%3A%2F%2Fwww.hwinfo.com%2Fimages%2Fhwi_logo_flat_square_192.png&hash=a66bfec5b75dc239826f3e5e0e082b1d&return_error=1)
2. (post #13)
Normal vs. Snapshot polling mode
Hi Martin, and everybody here! Here is screenshot of my PC running Cinebench R23 MT test. I've merged two sensor panel screenshots from different modes. Can someone explain, why reported core VID's values are - all the same and close to Vcore SVI2 value (normal mode - left panel) - all...
![www.hwinfo.com](/forums/proxy.php?image=https%3A%2F%2Fwww.hwinfo.com%2Fimages%2Fhwi_logo_flat_square_192.png&hash=a66bfec5b75dc239826f3e5e0e082b1d&return_error=1)
3. The voltages of 1.4~1.5V is what the board VRM are supplying. At least on my R5 3600/AorusPro X570 system I can verify this via the VR sensor readings (VR VOUT).
Anyone with VR VOUT readings and 5000series CPU? ...shed some light please, although I expect it to be the same as 3000series (see 2.)
4. I too don't think it's pointless. The individual offset could just mean different end speed for each core at the same voltage, but that is not something I can verify as I don't own a 5000 CPU. And this is making sense if you think about how the core speeds are acting under stock conditions. Why the curve optimizer would work any different? It is just a voltage/speed curve alteration over stock.
5. As matter of fact, after I enabled it I see identical VIDs (cur/min/max/avg). Prior to this there was a difference in requests. And again, I own a 3000series CPU.
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Lets not forget that there is no software that can monitor and report speed/voltage 100% accurately when those values are different every 1~20ms (depending power plan), and a software's polling period is 500, 1000, 2000ms.
By the way, dont use polling period under 1000ms on HWiNFO because it will probably keep the CPU more on active state (and on higher voltage) and out of halt/sleep states.