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AMD in its 2022 Financial Analyst Day presentation claimed that it will repeat the over-50% generational performance/Watt uplift feat with the upcoming RDNA3 graphics architecture. This would be a repeat of the unexpected return to the high-end and enthusiast market-segments of AMD Radeon, thanks to the 50% performance/Watt uplift of the RDNA2 graphics architecture over RDNA. The company also broadly detailed the various new specifications of RDNA3 that make this possible.
To begin with, RDNA3 debuts on the TSMC N5 (5 nm) silicon fabrication node, and will debut a chiplet-based approach that's somewhat analogous to what AMD did with its 2nd Gen EPYC "Rome" and 3rd Gen Ryzen "Matisse" processors. Chiplets packed with the GPU's main number-crunching and 3D rendering machinery will make up chiplets, while the I/O components, such as memory controllers, display controllers, media engines, etc., will sit on a separate die. Scaling up the logic dies will result in a higher segment ASIC.
AMD also stated that it has re-architected the compute unit with RDNA3 to increase its IPC. The graphics pipeline is bound to get certain major changes, too. The company is doubling down on its Infinity Cache on-die cache memory technology, with RDNA3 featuring the next-generation Infinity Cache (which probably operates at higher bandwidths).
From the looks of it, RDNA3 will be exclusively based on 5 nm, and the company announced, for the very first time, the new RDNA4 graphics architecture. It shared no details about RDNA4, except that it will be based on a more advanced node than 5 nm.
AMD RDNA3 is expected to debut in the second half of 2022, with ramp across 2023. RDNA4 is slated for some time in 2024.
View at TechPowerUp Main Site
To begin with, RDNA3 debuts on the TSMC N5 (5 nm) silicon fabrication node, and will debut a chiplet-based approach that's somewhat analogous to what AMD did with its 2nd Gen EPYC "Rome" and 3rd Gen Ryzen "Matisse" processors. Chiplets packed with the GPU's main number-crunching and 3D rendering machinery will make up chiplets, while the I/O components, such as memory controllers, display controllers, media engines, etc., will sit on a separate die. Scaling up the logic dies will result in a higher segment ASIC.
![](https://www.techpowerup.com/img/lJ6Hh78cIZoi3Va8_thm.jpg)
![](https://www.techpowerup.com/img/bYvGadlOXkYWh5EI_thm.jpg)
AMD also stated that it has re-architected the compute unit with RDNA3 to increase its IPC. The graphics pipeline is bound to get certain major changes, too. The company is doubling down on its Infinity Cache on-die cache memory technology, with RDNA3 featuring the next-generation Infinity Cache (which probably operates at higher bandwidths).
From the looks of it, RDNA3 will be exclusively based on 5 nm, and the company announced, for the very first time, the new RDNA4 graphics architecture. It shared no details about RDNA4, except that it will be based on a more advanced node than 5 nm.
AMD RDNA3 is expected to debut in the second half of 2022, with ramp across 2023. RDNA4 is slated for some time in 2024.
View at TechPowerUp Main Site