Zen 4 X3D Limited to 8-Core and 6-Core, No Meteor Lake in 2023: Frosty Year Expected for CPU Market

[ratirt]

You will still get the same refresh but with slight power modification at best. If "serious gains" is only power related than we are agree.
But the node will stay the same as originally pland, the new arc benefit will not change so IPC will not change, core number also will stay the same as pland. Those are the thing, imo, that you need to change in order to get "serious gains"

With the node I disagree as well.
That is not the design of the arch of a chip but node it is being manufactured at like TSMC5nm node. So the node does not stay the same necessarily it can change if the design can be ported to a more advanced node. The architecture or the design of the chip stays the same if there is no improvements necessary but the node the chip can be manufactured at can change. Variety of things can be done to the chip after the architecture design is ready. Not major but these can change noticeable the outcome of a chip.

 

[Nanochip]

AMD and Intel are focusing on the data enter and Server market. Genoa is a 96 core gorilla that dominates threads. at the announcement Lisa Su said: “the datacenter represents our largest growth opportunity and the number-one strategic priority for our company.”

And while Sapphire rapids’ volume ramp hasn’t been rapid whatsoever, it’s finally entering HVM. Intel is well underway at work on future Rapids like emerald and granite.

it’s not a frosty year for server where amd is asking for up to $11,000 for a cpu, and can’t make them fast enough.

 

[stimpy88]

If only AMD would not cache-starve their CPU's so badly in the first place. I hope they double the L3 cache in the next node shrink, at least on the higher-end parts, but I doubt they have the killer instinct to go after Intel like that. They seem to have run out of desire/ability to beat them now.

 

[Daven]

AMD and Intel are focusing on the data enter and Server market. Genoa is a 96 core gorilla that dominates threads. at the announcement Lisa Su said: “the datacenter represents our largest growth opportunity and the number-one strategic priority for our company.”

And while Sapphire rapids’ volume ramp hasn’t been rapid whatsoever, it’s finally entering HVM. Intel is well underway at work on future Rapids like emerald and granite.

it’s not a frosty year for server where amd is asking for up to $11,000 for a cpu, and can’t make them fast enough.

I hope that CPU releases slow down anyway. We don’t need a new product family every year that adds incremental performance and features.

 

[stimpy88]

I hope that CPU releases slow down anyway. We don’t need a new product family every year that adds incremental performance and features.

You do realise that the 12%+ IPC improvements plus frequency improvements from one generation to the next, is the same as 4-5 generations of previous Intel offerings over more than 6 years, right?

I for one, appreciate just how much faster CPU's have got over the last 5 years, compared to the previous 14+ years of 1-3% "improvements" every two years, and not to mention that I love having more than 2 cores!

 

[pressing on]

Perhaps Intel's analysts predict a really harsh economic downturn, so they are now focusing on trimming down the company and reducing costs, and will focus on delivering a new CPU generation when the conditions are better?

Intel have announced a round of cost cutting measures as part of its strategy for the downturn in the market for PCs particularly notebooks and laptops.

As far as the desktop is concerned, in Q3 2022 Intel did OK, revenue was up 3% and according to Mercury Research they increased desktop market share from 79.5% to 86.1%. Going forward the budget 13th gen (Raptor Lake) processors will launch in January 2023, except for the 12100 that will be replaced by a 'Raptor Lake refresh' 13100. I find the idea of some form of desktop Raptor Lake refresh a little surprising. I suspect that given the delay on 14th gen (Meteor Lake) mobile, that what this refers to is the release of a series of 'Raptor Lake refresh' CPUs in early 2023 for notebooks and laptops. I would expect Meteor Lake on the desktop to launch later in 2023. It seems unlikely to me that Intel would be launching both Meteor Lake and Arrow Lake in 2024. I would not be surprised if Meteor Lake mobile launched in 2024 and Arrow Lake was released in late 2024, but if conditions worsen might be pushed back to early 2025.

The notebook and laptop sector in terms of revenue has been pretty bad for Intel, revenue was down 26% in Q3 2022. Despite that Mercury Research say they increased market share in this sector in Q3 2022 from 75.2% to 84.3%. It's already known that the intended release of Meteor Lake mobile, originally scheduled for early 2023 will not happen. Given the overall situation it would make sense for Intel to release a 'Raptor Lake refresh' of the mobile CPUs they released in April 2022, and push Meteor Lake mobile back to 2024.

Looking at AMD, the financial figures for Q3 2022 are fairly well-known and there was a small loss for that quarter for the Desktop and Mobile sector. Part of that would have been due to the general downturn in the PC market, particularly notebooks and laptops but it was obviously compounded by the losses in market share to Intel for that quarter. AMD did increase its market share over Intel in the server market by around 4% in Q3 2022 according to Mercury, so it was not all bad news. Given that Intel seems to be delaying future releases, I think this is something that AMD may need to seriously consider. It would not surprise me if Zen 5 was delayed by a year or two.

 

[Valantar]

Again private companies may have quality control criteria that cannot be independently verified by third parties. TPU testing values have nothing to do with internal AMD spec decisions.

That's not how reality works. No, third parties don't have access to AMD's specific QC criteria or their engineering systems for determining TDPs and the like, but their TDP equation is public, as are the power draw limits of the chips and the platform, which are published openly as well as in much more detail to specialty press and partner companies.

What TPU does is test the real-world power draw - but up until the most recent round of testing they've only tested full-system power draw for CPUs, which is a severe methodological flaw, as it introduces far too much variance to produce reliable CPU power draw numbers. Depending on the application used to stress the system, full-system power draw can increase noticeably with a faster CPU at the exact same CPU-only power due to the faster CPU loading the RAM, PCIe, storage, or other subsystems more heavily. That TPU hasn't been using a clamp meter on the 12VEPS power cable for CPU power measurements until now is quite frankly baffling, and I'm extremely happy they've changed this.

Of course there are also questions of variability due to motherboards implementing different boost schemes, MCE, PBO, and so on differently for different chips. If you look at the most recent TPU CPU reviews, you'll see there's little variance between the 144W PPT Zen3 CPUs (5900X, 5950X), with the 138W 5800X sitting slightly below, and the 88W 5600X quite a bit below that again - though there is some variability due to this testing using a real world application (Blender) rather than a synthetic(-like) power virus/power draw generator like Prime95 or something else spawning nT of identical worker threads. Doing actual work will always differ somewhat from synthetics, but what you will see is that none of these exceed their PPT limits, which is AMD's spec.

AMD already admitted that they downclocked due to platform limitations.

Those "platform limitations" are specifically the lack of a separate voltage plane for the cache die, and not something relating to overall power draw or anything like that. It's just the simple fact that the L3 cache on AM4 must be on the same voltage plane as the core, and when the 3D V-cache can't handle above 1.35V, then the cores can't be fed more than that either. It has nothing to do with the platform not handling the power draw of a higher clocked X3D CPU - heck, the 5800X3D consumes a lot less power than the regular 5800X.

This is already an admission of a big negative.

It's a drawback, sure, but "a big negative"? Nah. Just a minor annoyance that's extremely understandable when you introduce a brand-new feature like that on a 4th-gen product on the same platform. You don't design a platform with a bunch of spare voltage planes just because a future product might possibly need them at some point.

And again, the AM5 has more power headroom and therefore the 3d cache parts could be clocked higher than the non 3d cache parts.

This is a misunderstanding, see above. The 5800X3D is in no way held back due to power draw limitations of the platform. You seem to have missed out on some crucial information regarding these platform limitations which is leading you to think they are something entirely different from what they actually are.

 

[chrcoluk]

You do realise that the 12%+ IPC improvements plus frequency improvements from one generation to the next, is the same as 4-5 generations of previous Intel offerings over more than 6 years, right?

I for one, appreciate just how much faster CPU's have got over the last 5 years, compared to the previous 14+ years of 1-3% "improvements" every two years, and not to mention that I love having more than 2 cores!

Downside makes existing chips obsolete faster. We need less frequent products everywhere really cpus, gpus phones. Intel was wrong back then as well. Its just we talking about the here and now. I think every 3 years for new sku is sweet spot, but everything is rapid rollout these days, hardware and software.

 

[Valantar]

Downside makes existing chips obsolete faster. We need less frequent products everywhere really cpus, gpus phones. Intel was wrong back then as well. Its just we talking about the here and now. I think every 3 years for new sku is sweet spot, but everything is rapid rollout these days, hardware and software.

The problem is that we have a computing industry that's fundamentally built around a completely unsustainable - in every single sense of the word - cycle of frequent upgrades and replacements. Which of course grew somewhat spontaneously out from the rapid improvements seen over the past three decades or so - but that's running headfirst into several walls that risk massive collapse in several ways. On the one had you have the ballooning increase in complexity of any actual performance improvement, both architectural and in node improvements. On the other you have the undeniable fact that unlike a decade ago, even an entry level, five-year-old CPU is good enough for many basic tasks. GPUs are of course not in this situation as it's relatively trivial to just make up new challenges for them - but even there we've seen the bar rapidly move from "can I even play this game?" to "can I run this game at Ultra and high FPS?". Those of us old enough to remember PC building in the 2000s know just how massive of a change this is. And due to the massive backwards compatibility of PCs and the proliferation of great less graphically demanding games (whether indie, esports, or something else), a five-year-old GPU is also still perfectly usable for a lot of things today. Which means that an industry built on a 1-2-year upgrade cycle is headed off a cliff, and the only thing they can do about it is adjust to a much slower pace. Unfortunately these companies are beholden to shareholders and operate in highly competitive, mostly unregulated markets where adjusting to a slower pace would likely be just as suicidal as not doing so. Ain't late-stage capitalism fun?

 

[Punkenjoy]

The rumors is the 3D v-cache is greatly improved with Zen4, we shouldn't see lower clock or overclocking to be disabled.

Again, 3 main reason i think we will not see multi CCD Ryzen X3D cpu

- Gaming is one of the few workload that really benefits it, the second CCD Could cause more problem than it solves in this case, you would want to ensure the OS cache all the data in a Single CCD than splitting it accross 2 CCD. It's as slow as going to ram to lookup the Other CCD cache so that defeat the purpose. By having only one CCD, you ensure all the data is cached there and can be reused.

- Workload that really benefits from a lot of core like video encoding, 3D rendering for VFX, etc do not benefits from the extra cache. The other application that could benefits from it are either very niche or professional simulation software that cost a fortune for each license and are better spend on a high core count EPYC with 3d v-cache.

The last one is important, I think this is a segmentation point here, pushing people needing a lot of cache to go to EPYC that is way more expensive. (but also way more powerful).


But at last, This is a rumors, we all know how last rumors were all over the place so lets wait and see. AMD could maybe prepare a 2 CCD with 3D v-cache to sell it to few whales that have too much money to spend.

 

[Valantar]

No, that is not why the 5800X3D was down-clocked and had overclocking locked. AMD made those restrictions so the CCD wouldn’t overheat the 3D V-cache chips. The first gen 3D V-cache chips are highly temperature sensitive.

Not overheating, voltage limitations. The cache die can't handle voltages above 1.35V, and shares a voltage plane with the cores and native L3 cache, meaning they had to limit max boost vCore to 1.35V - which also limits how high they could clock. That's why OCing is locked down too, as OCing inevitably means increasing voltage, especially with AMD's opportunistic boost systems.

 

[PrettyKitten800]

If only AMD would not cache-starve their CPU's so badly in the first place. I hope they double the L3 cache in the next node shrink, at least on the higher-end parts, but I doubt they have the killer instinct to go after Intel like that. They seem to have run out of desire/ability to beat them now.

AMDs chips aren’t cache-starved at all. 32MB of L3 cache per CCD is a lot. The only Intel chip with more L3 capacity than the 7600x/7700x is the 13900k with 36MB. The 7900x and 7950x both have 64MB of L3 cache.

Not overheating, voltage limitations. The cache die can't handle voltages above 1.35V, and shares a voltage plane with the cores and native L3 cache, meaning they had to limit max boost vCore to 1.35V - which also limits how high they could clock. That's why OCing is locked down too, as OCing inevitably means increasing voltage, especially with AMD's opportunistic boost systems.

I realized my comment was incorrect and deleted it after seeing your original reply on the other post. My bad for trying to spread bad information.

 

[Valantar]

I realized my comment was incorrect and deleted it after seeing your original reply on the other post. My bad for trying to spread bad information.

No problem - the information around this has been extremely selective and rather vague from AMD's side, with the specific reasoning only given in a few specific interviews AFAIK. It's an easy thing to get confused about, that's for sure!

The rumors is the 3D v-cache is greatly improved with Zen4, we shouldn't see lower clock or overclocking to be disabled.

Again, 3 main reason i think we will not see multi CCD Ryzen X3D cpu

- Gaming is one of the few workload that really benefits it, the second CCD Could cause more problem than it solves in this case, you would want to ensure the OS cache all the data in a Single CCD than splitting it accross 2 CCD. It's as slow as going to ram to lookup the Other CCD cache so that defeat the purpose. By having only one CCD, you ensure all the data is cached there and can be reused.

- Workload that really benefits from a lot of core like video encoding, 3D rendering for VFX, etc do not benefits from the extra cache. The other application that could benefits from it are either very niche or professional simulation software that cost a fortune for each license and are better spend on a high core count EPYC with 3d v-cache.

The last one is important, I think this is a segmentation point here, pushing people needing a lot of cache to go to EPYC that is way more expensive. (but also way more powerful).


But at last, This is a rumors, we all know how last rumors were all over the place so lets wait and see. AMD could maybe prepare a 2 CCD with 3D v-cache to sell it to few whales that have too much money to spend.

You're mostly right, but that first point is a non-issue. The CPU is aware of which core the cached data is relevant to, and doesn't place data for a CCD0 thread in CCD1's L3 cache. Other than that though you're on point - there are plenty of server/HPC workloads that benefit from 3D V-cache, but very few consumer workloads do to any noticeable degree.

One interesting possibility for AMD going forward, as a response to Intel's hybrid architecture: variable cache layouts, with only one CCD getting the V-cache. Other than the physical difficulty of having 3D cache on one CCD and not on the other (the other would then need a layer of "structural silicon" for flatness and thermal transfer), AMD could probably do this without too much difficulty. It would be a far simpler scheduler thing than separating Intel's P and E cores at least, as their capabilities are much more different than just Zen4 cores with different amounts of cache. And AMD has already worked with MS to ensure the scheduler keeps threads belonging to the same workload (such as games) on the same CCD as much as possible. I really doubt this would happen (there'd likely be a minor uproar among enthusiasts who want specs just for the sake of specs), but it would be possible.

 

[Slizzo]

"AMD is only expected to launch 6-core/12-thread and 8-core/16-thread SKUs with the 3DV cache technology. These would be single-CCD packages. There's no word on dual-CCD ones with 12-core or 16-core counts, so a Ryzen 9 7950X3D is not on the horizon."

And the 3D counterparts will again have lower clocks and lower productivity, and only gain in very specific tasks,
- gaming fortunately being one of them.

But modern CPUs are very rarely bottlenecks, unless you specifically search for such situations - low resolution high FPS gaming with top end graphics cards. Once you introduce v-sync or other frame limiting tech, or use higher resolution or ray-tracing, effect of CPU speed largely dissapears.

Not really, partially reason was locked voltage control as noted below.

The 5800X3D was downclocked due to the 140W limit of socket AM4. Since it was a 105W chip, that limit would have been exceeded by the addition of the extra cache and the higher turbo clock.

Now socket AM5 has a 230W limit. The 7600X and 7700X are lower wattage chips using only 105/180W versus the 170/230W of the 12/16 core parts. There is power headroom for cache to be added to the 6 and 8 core versions AND increase the clocks.

It was not some sort of physics that forced AMD to lower clocks after adding cache on the 5800X3D but the power limitations on the old socket AM4. AMD does not have that problem on AM5 unless they were adding cache to the higher power 12 and 16 core parts which go up to 230W. The leak says they are not adding cache to these parts.

I estimate higher clocks AND 3D cache on the 7600X3D and 7800X3D.

Power limits weren't reason for poor clocking on 5800X3D.

I'm honestly entirely fine with this. While AMD is at a distinct disadvantage in terms of core counts and nT workloads, 6c X3D CPUs should be a killer gaming offering - they just need to come with appropriate price cuts across the range. Cut the 7600X to $200-230, sell the 7600X3D for $270-300, and do a similar move for the 7700X and the 7700X3D.

I'm more "worried" (not that current CPUs aren't stupidly fast already, so no real worries, but still...) that Meteor Lake is seeing yet another delay. I wonder what the catch is. Low fab yields? Low packaging yields? Something else?


The 5800X3D had reduced clocks partially for thermal protection due to the extra insulating layer of (blank) silicon on top of the CPU cores, and partially because the cache die couldn't tolerate voltages above 1.35V at all. This is also the reason for it being locked for OCing, as OCing necessitates voltage control, and higher clocked Ryzens often boost above 1.45V, even if it's for short periods of time.

The question is whether the cache die for Ryzen 7000X3D will have its own voltage plane, decoupled from core/on-die cache voltages, which would be a possible way around this - if such a separation is possible.

Robert Hallock, a while ago, already confirmed that voltage will not be an issue for the 7000X3D parts. People need to remember that 3D V-cache was proof of concept on 5800X3D, and 7000 series was always designed from the get go to accommodate 3D V-Cache on the package design.

I expect the new 7000X3D CPUs to have at least similar clocks to that of regular 7000 series processors. Now whether this "rumor" about only the two lower skus having 3D V-cache are true, who knows. Over on Reddit it's already been reported that this "leaker" has an extremely poor track record of hits on their rumors, so who knows. Speculation over there thinks that 8 core and 16 core make more sense to have the 3D V-cache as it'll give gamers and enthusiasts their own SKU to buy into the X3D processors. I like that train of thought, but this far out who knows? We still have a couple months to go.

 

[Punkenjoy]

You're mostly right, but that first point is a non-issue. The CPU is aware of which core the cached data is relevant to, and doesn't place data for a CCD0 thread in CCD1's L3 cache. Other than that though you're on point - there are plenty of server/HPC workloads that benefit from 3D V-cache, but very few consumer workloads do to any noticeable degree.

It should be a non-issue normally if the OS would schedule thread correctly on multi-ccd workload. But that is not always the case, this is why a 7700x is sometime faster than the 7950x in some games.

As for the cache aware, it's true for what it know. If you have by example 12 thread that run and modify the same data set. And one of them get scheduled on the second CCD, the written data will be on the other CCD and it will need to be read probably from main memory by the first CCD to continue creating latency.

The core itself do not schedule and they are not aware of other thread.

In an ideal world the OS would schedule all those 12 thread on the same CCD and run them with SMT instead. There is still a lot of improvement to be made there.

 

[Valantar]

Robert Hallock, a while ago, already confirmed that voltage will not be an issue for the 7000X3D parts. People need to remember that 3D V-cache was proof of concept on 5800X3D, and 7000 series was always designed from the get go to accommodate 3D V-Cache on the package design.

Yeah, I know, and it stands to reason really - when a feature that radical is added to anything other than the first generation of CPUs for a platform, it'll always be somewhat of a proof of concept (unless the platform design team was explicitly told to design for a specific future need, which is quite unlikely). On the other hand it's rather obvious that AM5 is built for 3D V-cache from the ground up, so they can allow for as fine or coarse control of whatever variables they might want.

 

[AnarchoPrimitiv]

That's definitely a possibility, especially as AMD clearly aren't very focused on competing in consumer markets right now for whatever reason.

Probably because enterprise makes up the majority of the x86 market with respect to revenue

 

[ARF]

Lets the clown show with delay after delay of the 7nm and refresh after refresh of the 10nm start again

Yes, I would think that Intel begins to show signs that it has problems post 10 nm (Intel rebranded "Intel 7" process) processes.

So, AMD has a chance to grab even more market share but given AMD's recent quite conservative progress based on increasing the TDP from 105 to as high as 170 officially and over 200 watts in reality, things look grey for the market. Stagnation, Moore's law is indeed dead and buried years ago.

Customers can be happy - invest in a good setup these days (preferably by July 2023) and keep it for over 5 years with ease.

 

[mb194dc]

CPU performance took a great leap ahead after Ryzen 1 in 2017.

In my view, the top multi threaded chips now will still be good in 10 or more years.

There's simply no need for such performance for 95%+ of home computing use cases. CPU is largely irrelevant for 4k 60 gaming, for example.

It's servers that can really benefit and still hard to get cheap multi core chips. I imagine that will change.

 

[Dirt Chip]

With the node I disagree as well.
That is not the design of the arch of a chip but node it is being manufactured at like TSMC5nm node. So the node does not stay the same necessarily it can change if the design can be ported to a more advanced node. The architecture or the design of the chip stays the same if there is no improvements necessary but the node the chip can be manufactured at can change. Variety of things can be done to the chip after the architecture design is ready. Not major but these can change noticeable the outcome of a chip.

Node change (smaller than intel 4, that is planned for meteor lake) will take 3 years, not 1. Intel can't afford to wait that much until new release.
You can try to port it to tsmc instead but it will take more time and will cost much more. I can't see any of this happening, but will see.

 

[mechtech]

The winters are always frosty in the north.

 

[ARF]

CPU performance took a great leap ahead after Ryzen 1 in 2017.

In my view, the top multi threaded chips now will still be good in 10 or more years.

There's simply no need for such performance for 95%+ of home computing use cases. CPU is largely irrelevant for 4k 60 gaming, for example.

It's servers that can really benefit and still hard to get cheap multi core chips. I imagine that will change.

There is an undeclared planned obsolescence via software updates. For example, my 4-core / 8-thread Ryzen gets severe stutter in games in which it previously had run smoothly.

 

[Max(IT)]

to be honest, we don't need a new architecture every year, so I'm not worried about this news. Hopefully a longer lifespan of current platform will lead to a price reduction over the time, especially for motherboards.

Yes, with 10x the RED budget and still behind. Thats says a lot. Meanwhile do you remember where was AMD 6-7 years ago? And Intel?

still behind ? Last time I checked Intel has a faster processor than AMD, in most of the scenarios.

 

[ARF]

still behind ? Last time I checked Intel has a faster processor than AMD, in most of the scenarios.

Hardly faster. It's about the same; faster, slower or equal depending on the load.

Intel Core i9-13900K review - Performance - Corona Ray Tracing (guru3d.com)

 

[Imaamdfanboy]

"AMD is only expected to launch 6-core/12-thread and 8-core/16-thread SKUs with the 3DV cache technology. These would be single-CCD packages. There's no word on dual-CCD ones with 12-core or 16-core counts, so a Ryzen 9 7950X3D is not on the horizon."

And the 3D counterparts will again have lower clocks and lower productivity, and only gain in very specific tasks,
- gaming fortunately being one of them.

But modern CPUs are very rarely bottlenecks, unless you specifically search for such situations - low resolution high FPS gaming with top end graphics cards. Once you introduce v-sync or other frame limiting tech, or use higher resolution or ray-tracing, effect of CPU speed largely dissapears.

I'm actually glad they are doing the 6/8 cores. They are looking after the budget market... Thanks AMD...