NVIDIA GeForce RTX 4090 PCI-Express Scaling

[Tek-Check]

I'm not sure whether you generated that image or you got it from somewhere else, but according to Intel's ARK and other Intel documentation the Alder Lake/Raptor Lake CPU only supports bifurcating the PCIe x16 into two x8 slots. There is no evidence of x8/x4/x4 like was supported on Z590 and before. So there can only be one PCIe 5.0 M.2 slot on an Intel CPU. The other 4 lanes would go unused in that case.

Also, Intel says "Up to 20 PCIe 4.0" and "Up to 8 PCIe 3.0" for Z790, but your diagram would be 18 and 10, respectively. Two of the PCIE 3.0 lanes in your diagram should be PCIe 4.0.

All lanes are there, in total 28. There are two PCIe 4.0 lanes under SATA. Forgot to change the colour and text for those two. Thanks for the pedantic reminder. Will do once back home.

As for PCIe birurcation, several options are possible, depending on what vendors want to do. There could be AIC x8 for two M.2 drives. There could be two separate x4 M.2 slots if vendors install PLX switch chip on bifurcated lanes.

I marked it as two x4 for the sake of how many Gen5 drives could use full bandwidth from CPU, rather than as implemented solution on motherboard.

 

[The Von Matrices]

All lanes are there, in total 28. There are two PCIe 4.0 lanes under SATA. Forgot to change the colour and text for those two. Thanks for the pedantic reminder. Will do once back home.

As for PCIe birurcation, several options are possible, depending on what vendors want to do. There could be AIC x8 for two M.2 drives. There could be two separate x4 M.2 slots if vendors installs PLX switch chip on vifurcated lanes.

I marked it as two x4 for the sake of how many Gen5 drives could use full bandwidth from CPU, rather than as implemented solution on motherboard.

Where are these diagrams from, by the way? They're very helpful.

 

[Tek-Check]

Where are these diagrams from, by the way? They're very helpful.

I made them, based on the same documents you referred to. Thanks for nice words.

 

[grilli4nt]

This is a very interesting topic, as I building my gen 13 build with a 4090, and want to be future proof for m2 gen5, but dont really want to jeopardize any performance from my 4090, not even a few percentages if possible, than I'd rather go with a cheaper MB (such as the strix-f) and go PCIe nvme gen5 next upgrade in a few years when this is more mainstream.

I am particiarly looking at buying the z790 maximus hero. It has a PCIe gen 5 x16 but if I connect a gen5 m2 ssd in the gen2 slot, the GPU PCIe slot halves. But is this really a problem, or am I missing something here? I know the GPU dont run PCIe 5, but the bandwidth from the motherboard is still based on gen 5?

So halving a gen 5 PCIe x 16 into two gen 5 x 8 slots, that is still the same as x16 for each slot if translated to gen 4? I.e, there should be plenty room and absolutely no loss in performance running an m2 gen5?

Is it really accurate to say that when the PCIe gen 5 x 16 gets halved (as a result of inserting m2 gen5), it results in 2 x gen4 x 8 slots? Shouldn't it rather be 2x gen5 x8 slots, which essentially is the same as 2x gen4 x 16 slots?

This is a snippet from the Maximus Hero z790 specs:

Forgive me if im completely wrong here, just wanted to see if this makes any sense at all?

 

[Nopa]

This is a very interesting topic, as I building my gen 13 build with a 4090, and want to be future proof for m2 gen5, but dont really want to jeopardize any performance from my 4090, not even a few percentages if possible, than I'd rather go with a cheaper MB (such as the strix-f) and go PCIe nvme gen5 next upgrade in a few years when this is more mainstream.

I am particiarly looking at buying the z790 maximus hero. It has a PCIe gen 5 x16 but if I connect a gen5 m2 ssd in the gen2 slot, the GPU PCIe slot halves. But is this really a problem, or am I missing something here? I know the GPU dont run PCIe 5, but the bandwidth from the motherboard is still based on gen 5?

So halving a gen 5 PCIe x 16 into two gen 5 x 8 slots, that is still the same as x16 for each slot if translated to gen 4? I.e, there should be plenty room and absolutely no loss in performance running an m2 gen5?

Is it really accurate to say that when the PCIe gen 5 x 16 gets halved (as a result of inserting m2 gen5), it results in 2 x gen4 x 8 slots? Shouldn't it rather be 2x gen5 x8 slots, which essentially is the same as 2x gen4 x 16 slots?

This is a snippet from the Maximus Hero z790 specs:
View attachment 267281

Forgive me if im completely wrong here, just wanted to see if this makes any sense at all?

For Alder Lake & Raptor Lake, PCIe 5.0 GPU slot share lanes with PCIe 5.0 M.2 NVMe slots.

For Zen 4's X670E & B650E, you can have both PCIe 5.0 GPU (16 lanes) and PCIe 5.0 M.2 NVMe (8 lanes) separately.

 

[grilli4nt]

For Alder Lake & Raptor Lake, PCIe 5.0 GPU slot share lanes with PCIe 5.0 M.2 NVMe slots.

For Zen 4's X670E & B650E, you can have both PCIe 5.0 GPU (16 lanes) and PCIe 5.0 M.2 NVMe (8 lanes) separately.

I get that, but if the PCIe 5.0 GPU slot is shared with the PCIe 5.0 M.2 NVMe slot, doesnt that mean that each slot gets 8 lanes? Since Gen 5 should be 2x the bandwidth from gen 4, doesnt this mean that Gen5 slot x 8 equals gen 4 x 16? Maybe thats not how it works, but shouldn't above mean that when the PCIe 4.0 RTX 4090 is connected into the "halved" Gen 5.0 PCIe slot, the slot itself should be able to produce bandwidth similar to a Gen 4.0 x16 slot?

 

[Nopa]

I get that, but if the PCIe 5.0 GPU slot is shared with the PCIe 5.0 M.2 NVMe slot, doesnt that mean that each slot gets 8 lanes? Since Gen 5 should be 2x the bandwidth from gen 4, doesnt this mean that Gen5 slot x 8 equals gen 4 x 16? Maybe thats not how it works, but shouldn't above mean that when the PCIe 4.0 RTX 4090 is connected into the "halved" Gen 5.0 PCIe slot, the slot itself should be able to produce bandwidth similar to a Gen 4.0 x16 slot?

Yes, x8 of Gen 5 is equal x16 of Gen 4 in Bandwidth. But 4090 doesn't support Gen 5 and once running it on Intel's Z790 MB alongside an M.2 NVMe (Gen 4/5), it will divide Bandwidth with GPU slot which means it'll maximize at x8 of Gen4.

The GPU slot can fit one x4, one x8, one x16 of PCIe 3.0/4.0/5.0 (PCIe backward compatibility).

The M.2 slot can fit two Gen 5 x4 (Zen 4) (can run M.2 & GPU at maximum Bandwidth) and one Gen 5 x4 (Z690/Z790) (share two x4 to M.2 NVMe slot once running it alongside Gen 4/5 GPU).

 

[AusWolf]

I get that, but if the PCIe 5.0 GPU slot is shared with the PCIe 5.0 M.2 NVMe slot, doesnt that mean that each slot gets 8 lanes? Since Gen 5 should be 2x the bandwidth from gen 4, doesnt this mean that Gen5 slot x 8 equals gen 4 x 16? Maybe thats not how it works, but shouldn't above mean that when the PCIe 4.0 RTX 4090 is connected into the "halved" Gen 5.0 PCIe slot, the slot itself should be able to produce bandwidth similar to a Gen 4.0 x16 slot?

That's not how it works. If you have x8 lanes available, it will be x8 lanes of whatever gen the installed card supports. The 4090 is a gen 4 x16 card, so it will connect via gen 4 x8 (which is the equivalent of gen 3 x16).

 

[grilli4nt]

Yes, x8 of Gen 5 is equal x16 of Gen 4 in Bandwidth. But 4090 doesn't support Gen 5 and once running it on Intel's Z790 MB alongside an M.2 NVMe (Gen 4/5), it will divide Bandwidth with GPU slot which means it'll maximize at x8 of Gen4.

The GPU slot can fit one x4, one x8, one x16 of PCIe 3.0/4.0/5.0 (PCIe backward compatibility).

The M.2 slot can fit two Gen 5 x4 (Zen 4) (can run M.2 & GPU at maximum Bandwidth) and one Gen 5 x4 (Z690/Z790) (share two x4 to M.2 NVMe slot once running it alongside Gen 4/5 GPU).

That's not how it works. If you have x8 lanes available, it will be x8 lanes of whatever gen the installed card supports. The 4090 is a gen 4 x16 card, so it will connect via gen 4 x8 (which is the equivalent of gen 3 x16).

Thanks both for clarifying.

 

[Tek-Check]

That's not how it works. If you have x8 lanes available, it will be x8 lanes of whatever gen the installed card supports. The 4090 is a gen 4 x16 card, so it will connect via gen 4 x8 (which is the equivalent of gen 3 x16).

Yes. In this case, 4090 might lose some performance, 2-3%, if you run it in Gen4 x8 mode, with bifurcated M.2 Gen5 slots. Have a look into PCIe scaling tests.

NVIDIA GeForce RTX 4090 PCI-Express Scaling

The new NVIDIA GeForce RTX 4090 is a graphics card powerhouse, but what happens when you run it on a PCI-Express 4.0 x8 bus? In our mini-review we've also tested various PCI-Express 3.0, 2.0 and 1.1 configs to get a feel for how FPS scales with bandwidth.

www.techpowerup.com

Thanks both for clarifying.

This is what you could get installed on Z790 platform. Motherboard vendors can play with available lanes.

Where are these diagrams from, by the way? They're very helpful.

I updated the Z790 diagram above.

 

[Disco Dog]

Yes. In this case, 4090 might lose some performance, 2-3%, if you run it in Gen4 x8 mode, with bifurcated M.2 Gen5 slots. Have a look into PCIe scaling tests.

NVIDIA GeForce RTX 4090 PCI-Express Scaling

The new NVIDIA GeForce RTX 4090 is a graphics card powerhouse, but what happens when you run it on a PCI-Express 4.0 x8 bus? In our mini-review we've also tested various PCI-Express 3.0, 2.0 and 1.1 configs to get a feel for how FPS scales with bandwidth.

www.techpowerup.com

This is what you could get installed on Z790 platform. Motherboard vendors can play with available lanes.
View attachment 267908


I updated the Z790 diagram above.

I made an account to ask you a question. I realize this a month old now, but you have explained this better than anyone I've seen online so far (in my opinion).

In the diagram above, the pcie 4.0 M.2 NVM X 4 that shows four lanes in green on the CPU.
Are you saying that I could run (1) gen 4 nvme X 4 on the processor without knocking down to X 8 on the gpu? Are those the 4 lanes for the M2_2 position (which is also on the processor) I feel like this is it, I just wanted to make sure.

On my motherboard (Asus z790e) the M2_1 Gen 5 and M2_2 Gen 4 are on the processor. Other 3 are on the chipset.

I realize earlier you said "If you use any dedicated M.2 Gen5 slot with any NVMe drive on any Z790 board supporting Gen5 NVMe drives, your GPU slot will operate at x8 Gen5 with upcoming AMD GPUs and x8 Gen4 with Nvidia and Intel cards." The Gen 4 should just need 4 lanes, which show available, so I just wanted to be absolutely sure I couldn't run one Gen 4 in the M2_1 slot and another off the chipset. Heatsink just looks like it would be better on the M2_1 slot. Thanks for all your info.

 

[The Von Matrices]

I made an account to ask you a question. I realize this a month old now, but you have explained this better than anyone I've seen online so far (in my opinion).

In the diagram above, the pcie 4.0 M.2 NVM X 4 that shows four lanes in green on the CPU.
Are you saying that I could run (1) gen 4 nvme X 4 on the processor without knocking down to X 8 on the gpu? Are those the 4 lanes for the M2_2 position (which is also on the processor) I feel like this is it, I just wanted to make sure.

On my motherboard (Asus z790e) the M2_1 Gen 5 and M2_2 Gen 4 are on the processor. Other 3 are on the chipset.

I realize earlier you said "If you use any dedicated M.2 Gen5 slot with any NVMe drive on any Z790 board supporting Gen5 NVMe drives, your GPU slot will operate at x8 Gen5 with upcoming AMD GPUs and x8 Gen4 with Nvidia and Intel cards." The Gen 4 should just need 4 lanes, which show available, so I just wanted to be absolutely sure I couldn't run one Gen 4 in the M2_1 slot and another off the chipset. Heatsink just looks like it would be better on the M2_1 slot. Thanks for all your info.

The Z790 platform has a dedicated M.2 Gen4 slot, but if you want a Gen5 slot you have to steal lanes from the PCIe x16 slot since those are the only Gen5 lanes on the platform.

On that ASUS Z790-E board, if you use the M2_1 slot, it steals lanes from the PCIe slot, and the PCIe slot runs at X8. You should only use the M2_1 slot if you have a Gen5 M.2 drive or if every other slot is full.

If you have a Gen4 M.2 drive, then you should use it in the M2_2 slot so that it uses the dedicated CPU lanes and the PCIe slot runs at x16. If you have multiple Gen4 M.2 drives, then put the other drives in M2_3, M2_4, and M2_5. They are connected to the chipset and have a PCIe 4.0 x8 uplink, which will not present a bandwidth limitation and will also not steal lanes from the GPU.

 

[Disco Dog]

The Z790 platform has a dedicated M.2 Gen4 slot, but if you want a Gen5 slot you have to steal lanes from the PCIe x16 slot since those are the only Gen5 lanes on the platform.

On that ASUS Z790-E board, if you use the M2_1 slot, it steals lanes from the PCIe slot, and the PCIe slot runs at X8. You should only use the M2_1 slot if you have a Gen5 M.2 drive or if every other slot is full.

If you have a Gen4 M.2 drive, then you should use it in the M2_2 slot so that it uses the dedicated CPU lanes and the PCIe slot runs at x16. If you have multiple Gen4 M.2 drives, then put the other drives in M2_3, M2_4, and M2_5. They are connected to the chipset and have a PCIe 4.0 x8 uplink, which will not present a bandwidth limitation and will also not steal lanes from the GPU.

Awesome. Thank you!

 

[Frag_Maniac]

@ W1zzard,

in my PM to you, my question as to why a Gen 5 NVMe drive steals 8 Pci-Ex lanes on an Intel based MB, but not on an AMD based MB, with this response...

"It's simply due to the reason Intel configured the lane availability in their chipset, so they steal them from the GPU to offer Gen 5 NVMe, which otherwise wouldn't be avilable on the platform

If you switch the lanes to x16 3.0, you're still using 16 of 16 lanes available"

... but said nothing about why this is not the case with AMD based MBs? Do you know how AMD is getting that bandwidth for Gen 5 NVMe drives, if not from the Pci-Ex lanes?

And, yes, as I said, I know your test (and Steve Burke's at GamersNexus), showed negligible frame loss on Pci-Ex, but I'm concerned about how that will play out going forward, especially on the few games where the frame loss ISN'T as minuscule. After all, when one gets a top of the line GPU, he expects it to perform at it's best.

And yes, as I also said, I'm fully aware you can still use 16 lanes if you switch to Gen 3 Pci-Ex, but you did not answer my question as to whether Steve Burke at GamersNexus was correct in saying in 8x mode you don't necessarily get the same quality of lanes as in 16x mode.

 

[W1zzard]

... but said nothing about why this is not the case with AMD based MBs? Do you know how AMD is getting that bandwidth for Gen 5 NVMe drives, if not from the Pci-Ex lanes?

They simply have more Gen 5 lanes coming out of their processor

 

[Tek-Check]

whether Steve Burke at GamersNexus was correct in saying in 8x mode you don't necessarily get the same quality of lanes as in 16x mode

Average loss is 2-3% on Gen4 x8 vs. Gen4 x16 mode, in some games a bit more, in others nothing. Practically, negligible. You won't see any difference unless you are unlucky to play a specific game with 5-10% loss. Even then, this 5-10% could be in context of 300 fps vs 280 fps, which you wouldn't notice anyway.

Analyse the games tested and if there arenot perceivable losses in percentages converted into fps, you have nothing to worry about.

More performance is expected on Gen3 x8 vs. Gen3 x16 due to less available bandwidth.

 

[Frag_Maniac]

Thanks for the responses guys. While it's impressive the Ryzen 7000 series CPUs have that many Gen 5 lanes, especially given the high transfer rate on Gen 5, all the comparison reviews I've read on i7-13700K vs R7 7700X show the Intel chip winning on performance, so it doesn't appear to be worth a slight difference in gaming FPS that is only noticeable in benchmark stats.

Truth be told, I'm not even sure I will use the Gen 5 m.2 slot on the MB I'm considering, which are said to be able to produce read and write speeds as high as 12000 to 13000 Mb/s. Most are saying they will likely run a lot hotter, and elaborate heatpipe equipped heatsink/fan assemblies are already available to address that issue, many with so so results. My current NVMe isn't even running at full speed in the rig I have now, because I didn't want to give up the SATA 3 port it would require. The ASRock Z790 PG Riptide I'm considering has 8 vs my current 6 SATA 3 ports, but my NVMe drive even at full speed is only about 1/3 the speed of what a Gen 5 drive will be, and I've been sufficing with less than 2500 MB/s.

I mean I like my OS and programs to run fast, yeah, but I don't think I need them moving faster than I can blink.

 

[The Von Matrices]

Average loss is 2-3% on Gen4 x8 vs. Gen4 x16 mode, in some games a bit more, in others nothing. Practically, negligible. You won't see any difference unless you are unlucky to play a specific game with 5-10% loss. Even then, this 5-10% could be in context of 300 fps vs 280 fps, which you wouldn't notice anyway.

Analyse the games tested and if there arenot perceivable losses in percentages converted into fps, you have nothing to worry about.

More performance is expected on Gen3 x8 vs. Gen3 x16 due to less available bandwidth.

What confuses me is that I have tried these supposedly bandwidth-limited games on my own system with the same settings (I realize it's not the exact same configuration), and with GPU-Z open I never see bus utilization go over a few percent. If they are bandwidth limited then I would think that there would be at least one point where I would see high if not max bus utilization. Is that counter just not updated frequently enough to show these differences or am I looking at the wrong counter?

 

[Mussels]

What confuses me is that I have tried these supposedly bandwidth-limited games on my own system with the same settings (I realize it's not the exact same configuration), and with GPU-Z open I never see bus utilization go over a few percent. If they are bandwidth limited then I would think that there would be at least one point where I would see high if not max bus utilization. Is that counter just not updated frequently enough to show these differences or am I looking at the wrong counter?

It's only going to be an issue at very specific times, you'd need logging to have any record of it spiking up
HWinfo shows my recent gaming session as using 9% of the bus bandwidth and ~6GB of VRAM

I'd hazard a guess that something else may be part of the limiting factor here, like RAM speed and storage speed and that the extra lane bandwidth just helps timings match up (Like waiting for a frame update, a 60Hz display *must* wait 16.6ms but a 120Hz display at 60FPS might wait 16.6 or 8.3, if that content is ready at the exact right moment

TL;DR: might be a latency thing, not a bandwidth thing?

 

[armlegx]

The Z790 platform has a dedicated M.2 Gen4 slot, but if you want a Gen5 slot you have to steal lanes from the PCIe x16 slot since those are the only Gen5 lanes on the platform.

On that ASUS Z790-E board, if you use the M2_1 slot, it steals lanes from the PCIe slot, and the PCIe slot runs at X8. You should only use the M2_1 slot if you have a Gen5 M.2 drive or if every other slot is full.

If you have a Gen4 M.2 drive, then you should use it in the M2_2 slot so that it uses the dedicated CPU lanes and the PCIe slot runs at x16. If you have multiple Gen4 M.2 drives, then put the other drives in M2_3, M2_4, and M2_5. They are connected to the chipset and have a PCIe 4.0 x8 uplink, which will not present a bandwidth limitation and will also not steal lanes from the GPU.

I did this in my build because I misunderstood how the M2_1 slot stole lanes. I thought it would drop to PCIe 5.0x8 and not 4.0x8. I have the M2_1 and 2 slots populated with gen 4 ssds in raid 0.

I need to get back into the case because additional storage arrived along with a new psu. This seems like a good time to move the M2_1 slot drive to a different slot. Does anyone know if this would break the array? The raid is Intel rst through the bios.

 

[Upgrayedd]

They simply have more Gen 5 lanes coming out of their processor

So are they made with 16 lanes of PCIe5 and 20 lanes of PCIe4?

Thanks for the responses guys. While it's impressive the Ryzen 7000 series CPUs have that many Gen 5 lanes, especially given the high transfer rate on Gen 5, all the comparison reviews I've read on i7-13700K vs R7 7700X show the Intel chip winning on performance, so it doesn't appear to be worth a slight difference in gaming FPS that is only noticeable in benchmark stats.

Truth be told, I'm not even sure I will use the Gen 5 m.2 slot on the MB I'm considering, which are said to be able to produce read and write speeds as high as 12000 to 13000 Mb/s. Most are saying they will likely run a lot hotter, and elaborate heatpipe equipped heatsink/fan assemblies are already available to address that issue, many with so so results. My current NVMe isn't even running at full speed in the rig I have now, because I didn't want to give up the SATA 3 port it would require. The ASRock Z790 PG Riptide I'm considering has 8 vs my current 6 SATA 3 ports, but my NVMe drive even at full speed is only about 1/3 the speed of what a Gen 5 drive will be, and I've been sufficing with less than 2500 MB/s.

I mean I like my OS and programs to run fast, yeah, but I don't think I need them moving faster than I can blink.

So when you populate the M2(Gen5) slot, the main PCIe (G5) slot where your GPU goes would be reduced to x8 Gen5 lanes. Which is equivalent to x16 lanes of Gen4. Nvidia cards max at Gen4 x16 lanes. So by using a Gen5 M2 you should not be choking your GPU of any bandwidth unless it uses Gen5 lanes already, which nvidia cards don't.
8x Gen5 lanes provide the same bandwidth to a card as 16x Gen4 lanes.


This next part I'm just assuming because I couldn't find anything concrete on it. It seems like Intel CPUs have 16lanes of G5 and 20lanes of G4? Because usually when populating the CPU M2 for Intel the main PCIe slot isn't reduced because there is still 16lanes left. On the Intel website it just says 20 lanes and doesn't state if Gen5 and Gen4 have the same amount lanes.

 

[dinvlad]

So are they made with 16 lanes of PCIe5 and 20 lanes of PCIe4?

So when you populate the M2(Gen5) slot, the main PCIe (G5) slot where your GPU goes would be reduced to x8 Gen5 lanes. Which is equivalent to x16 lanes of Gen4. Nvidia cards max at Gen4 x16 lanes. So by using a Gen5 M2 you should not be choking your GPU of any bandwidth unless it uses Gen5 lanes already, which nvidia cards don't.
8x Gen5 lanes provide the same bandwidth to a card as 16x Gen4 lanes.

I thought so too but I don't think that's correct, unfortunately. Someone else on YT explained it better. But even the evidence in this article doesn't support this - otherwise, we wouldn't see any difference when the PCIE 5.0 port was reduced to x8..

Here's how that explanation goes. When NVidia (or any other 4.0 card) gets plugged into a PCIE 5.0 x16 slot, it "sees" this slot as if it was just 4.0 x16 physically. And so when an M.2 slot steals x8 lanes from this slot, it's as if the slot was physically cut in half. But the card still sees the full port as if it was 4.0 x16 - and when the lanes are stolen those lanes are cut in half in the same exact way - i.e. the card is not able to "convert" 5.0 x8 lanes into 4.0 x16 lanes - it now sees them as 4.0 x8, because it actually does physically communicate with it in 4.0 format from the start, it never sees it as 5.0 and is not able to utilize that extra 5.0 bandwidth at any point, even though the mobo would very much understand that. Which is why when those lanes are lost, they're lost :/

 

[Mussels]

Lanes are physically wired and only come in 16/8/4/1 - theres no "12x" lane option for GPU's to be wired to support

The GPU cant convert 5.0 x8 into 4.0 x16, it's the same bandwidth but you'd need dedicated hardware for that specific purpose, and that hasn't been done
For a 4.0 x16 GPU to understand a 5.0 x8 signal, it would have to be a 5.0 GPU in the first place - for anything else you'd literally need a physical device that was a PCI-E 5.0 card accepting signal from the first 8x connectors and passing it to the remaining 8x, and that translation delay would likely offset any gains from the extra bandwidth.


What i'm pretty confident on but need to investigate is how these split lanes work with different gen devices - would a PCI-E 2.0 NVME drive lock your primary slot to 8x 2.0?
I get the feeling that's a yes, but i'm also not confident on it

I'll go test this and get a definitive answer, at least for AM4

3090 @ 4.0 16

Add a 3.0 riser card with an x4 3.0 NVME

and receive...

(to be concluded, stay tuned for the thrilling confusion of "why cant i stop investigating all these things and just play video games")

Okay there we go:

Lanes can be 16/8/4, as determined by using the extra slots or not *at boot*

PCI-E gen can be different between the devices on the split lanes, and can change in real-time as my 3090 is running 8x 4.0, the NVME is 4x 3.0, and 4x just vanishes to never be seen again
(3090 can lower down to 1.1 in power saving and 4.0 when in use)

 

[W1zzard]

So are they made with 16 lanes of PCIe5 and 20 lanes of PCIe4?

So when you populate the M2(Gen5) slot, the main PCIe (G5) slot where your GPU goes would be reduced to x8 Gen5 lanes. Which is equivalent to x16 lanes of Gen4. Nvidia cards max at Gen4 x16 lanes. So by using a Gen5 M2 you should not be choking your GPU of any bandwidth unless it uses Gen5 lanes already, which nvidia cards don't.
8x Gen5 lanes provide the same bandwidth to a card as 16x Gen4 lanes.


This next part I'm just assuming because I couldn't find anything concrete on it. It seems like Intel CPUs have 16lanes of G5 and 20lanes of G4? Because usually when populating the CPU M2 for Intel the main PCIe slot isn't reduced because there is still 16lanes left. On the Intel website it just says 20 lanes and doesn't state if Gen5 and Gen4 have the same amount lanes.

The zen 4 cpu has 28 lanes gen 5. 4 of those go to the chipset. Since the chipset supports only gen4, they operate in gen 4 mode. The other lanes are typically used for x16 graphics and x4 nvme, but other configs are certainly possible, too

on lower cost boards the mobo vendor can lock the lanes to gen 4 if they can’t guarantee signal integrity for gen 5 (to save cost)

 

[Tek-Check]

I'll go test this and get a definitive answer, at least for AM4

AM4 platform doesn't support NVMe 2.0 standard, only up to 1.4, I believe.

Which is why when those lanes are lost, they're lost

It is that simple.
Bifurcation of x16 to x8x8 leaves eight lanes of whatever generation for any device to try to use it.

As no commercial device supports Gen5 speeds, slotting Gen4 device into Gen5 M.2 or PCIe slot will work as Gen4 device.

Eight Gen5 lanes left for GPU in x16 slot after bifurcation will work as Gen4 x8.