The TPU graph has the 14900k at 583.6 pts / watt. Way higher than the 7950x. Let's deal with the facts, okay?
I really tried to not go on and write a whole paragraph trying to explain where you're going wrong. Also, your argument is so far from the truth that you are probably just trolling at this point. Regardless, i'll do it anyway so please find the time to read it and hopefully you might learn a thing or two.
First off, the 'fact' is the review I linked to since it has data for both CPU's. I mean, I point to a review where you can calculate points points/W yourself for both intel and AMD where it's clear intel is behind at 65W and most certainly 35W. That's a fact. What's not a fact is you pointing to a different review where there's no data for AMD at 35W and comparing it to a calculated value from another review. Why don't you just use the one review with both sets of data? Your 'way higher' quote is comedic, I mean there's no data for AMD at 35W in your chart so uh..what?
There's literally a mountain load of evidence out there which points to the fact that Zen 4 is more power efficient. Everyone in the datacenter space that i'm in touch with have been super impressed by Zen 3 and 4, in fact the jump from 3>4 was absolutely staggering even though in the desktop it was a bit meh. Reason being, most of the gains were lower in the V/F curve and each Zen core puts out a stupid amount of performance with very little watts. There's no defying physics here because there's simply less to power on Zen 4 than Golden Cove/Raptor Lake. Fewer registers, less ALU's, less FPU's, smaller uop cache, narrower load, store and reorder window, denser packaging, not to mention the process node disadvantage. I mean it would be an absolute miracle if Intel consumes less power, but alas they do not. What's surprising is the sheer amount of performance those little(big) zen cores spit out even with those 'disadvantages'.
You must be aware that very few out there are buying Intel chips in the server space. Do you know what one of the primary issues in that space is? Power. The P cores have to clock so low to meet their power targets that they simply cannot even remotely compete with Zen. Plus the P cores are a lot bigger due to the much larger core so they can't really cram that many into one socket. No wonder they are switching to e-cores in that space now.
I'll attach a snip of a comparison between i9-13980HX vs R9-7945HX a while ago, so basically 13900k and 7950x in laptop form. Since many power levels are covered here, its pretty interesting. Nothing surprising though.
View attachment 13980hx-vs-7945hx.webp
HT seems overplayed by a lot of people. I dont think it was ever great to begin with, but its hay day was probably in the quad core era when 4 cores had scheduling bottlenecks in some games. IPC has always been more important, and the new direction of "smaller" cores obsolete's HT. HT's performance comes from filling in stalls/gaps in the pipe line (usually io wait), it typically was 0-10% benefit on processing throughput with maybe a few isolated use case where it would be higher, at the expense of much more power consumption.
Now we have chips with much more physical cores the use case for HT is diminishing and its a security headache.
I expect AMD to follow suit and remove SMT within one to two gens of Arrow Lake.
The discussion regarding HT is more complicated than it seems at first glance. Even though it increases threads/parallelism, it's used more so to keep the individual cores fed better and depends entirely on whether an architecture is designed with HT in mind or not. If you don't use SMT in a core which is designed around it, it's individual cores will just get underutilized and tests on Zen 4 show pretty good scaling on MT and negligible difference in ST.
Sure, the 'perfect' architecture is one without HT where every core gets pretty much fully utilized without SMT and that's a good thing. But reality isn't always quite that and there will always be bottlenecks and underutilization. Question is how much, and whether spending additional transistors on SMT will be worth it. Note that a well implemented SMT will have negligible losses in ST, but there's the argument to be made that maybe the extra transistors used for SMT can be used to increase core performance. It's all a trade off, which i'm sure Intel did when they decided to not have it for ARL but it might entirely be the case that Zen 6 will not be significantly different from Zen 5 and SMT will have a net benefit. We'll see.
Security headache for sure though, as intel learned the hard way.
