AMD Ryzen 9 9950X

[efikkan]

Quantifying The AVX-512 Performance Impact With AMD Zen 5 - Ryzen 9 9950X Benchmarks Review - Phoronix

www.phoronix.com

Even though this is mostly simulations, raytracing, "AI" stuff etc., it gives a taste of what we might have in store when more common productive applications will start to offer support. I'm thinking of things like Photoshop, Premiere, DaVinci Resolve, various CADs and modellers, etc.

Especially worth mentioning here is the difference of AVX2 vs. AVX-512 on Zen 4 vs. AVX-512 on Zen 5. Overall, there is still a lot of gain for the "double-pumped" 256-bit on Zen 4, and most of the difference over AVX2 here showcases how much instruction overhead (directly and indirectly) there is.

AMDs new ZEN5 CPUs weren't ready for prime time. They should have waited till the software and new motherboards were "Officially" ready. So now AMD needs to play catch-up because these CPUs should be at a min 10-12% IPC over the previous gen.

ZEN5 suffers from Windows Scheduling issues. The same happened with ZEN4 when they first came out.

IPC wouldn't change from software improvements.

Developing a scheduler is Microsoft's responsibility, not AMD's.
But specify what do you mean here; do you expect an optimized scheduler for generic CPU capabilities (like SMT, hybrid cores, etc.?), or one per microarchitecture?
I'm not aware of significant changes which should cause Zen 5 to behave significantly different from Zen 4, are you?

And in case you are expecting specialized schedulers then that's not going to be very sustainable in the long run. A couple of generations down the line, and Zen 5 owners will be "screwed" again, as sooner or later they will either have to drop something or make a hard choice which benefits the newer hardware at the cost of the old.

If hardware really needs this much specializing in the OS kernel, then something is heading down the wrong track. We need more robust hardware designs than this.

AMD did have an opportunity to really give it to Intel and all their major design issues. But nope lol, not yet I suppose.

Major design issues?
Are you talking about the issue of voltage causing prematurely worn CPUs? That's not a design/architectural issue at all.

It's not like any of them can observe the other and 6 months later release a product based on those decisions. The major design of Zen 5 was done years ago. They have two or three generations in development at any time.

I think many are just having unrealistic expectations. As I said months ago, it would take a lot to catch up with and even beat Raptor Lake in performance per core. This is not helped by clickbait YouTube channels and rumor sites trying to make up the most exciting and controversial news.

Overall, I'm not so disappointed in Zen 5 as most of the people in here seem to be. There are certainly use cases where it shines, and others where Intel shines. If AMD would get their act together and create Threadripper variants for these very quickly, at least down to 12 cores (8 cores too, preferably), I'd be very tempted to buy one.

 

[Launcestonian]

Zen 5 shares the EXACT same IMC as Zen 4, it's the same physical piece of silicon. There's some software changes though that have only a minor effect.

I couldn't even get 6000 stable at stock on my 9900X. What do you suggest how to proceed with the review if 6400 is the comparison baseline? I suspect that at least half my AM5 CPUs will not run 6400 1:1

This is from the AMD Ryzen 9000 reviewer's guide
View attachment 359106


Inded, I'm planning to switch to Zelda for the next rebench. Will probably hve to play a substantial part of the game though, to find a decent scene

Your definition of Exact is different to mine then, if you claim software changes have had minor effects, then they are by definition not exact.

I just ran prime 95 blend yesterday for over 6 hrs with 1:1 & 6000MT/S with my old Hynix M die kit, stable no problems. The chip you tested with must be a poor sample thanks to the silicon lottery perhaps?
PBO is enabled & tuned without the new curve shaper mechanism, I leave that on auto for time being hence why the power consumption is approx doubled from 65w TDP - Asrock's implementation of the current agesa.

But I can't be bothered arguing anymore, just going to leave this here & move on to testing at 6200MT/S, maybe post results in another thread.

 

[sdedalus83]

It is just not clocking well because too thick IHS and tight Wattage.

I doubt the IHS is limiting maximum clock speed, though it might be limiting in heavily threaded loads. Zen 5 has a much wider execution pipeline and higher density than you would expect from the node change, both of which can reduce the safe operating voltage. The maximum automatic VID decreased from 1.475v to 1.4v.

I just ran prime 95 blend yesterday for over 6 hrs with 1:1 & 6000MT/S with my old Hynix M die kit, stable no problems. The chip you tested with must be a poor sample thanks to the silicon lottery perhaps?

P95 blend isn’t a useful stability test. I can run it indefinitely on my 5800X3D at -30 all core, 3800MT/s, CL16, Cmd 1T, and GDM off. At those settings OCCT memtest fails in less than a second and the system crashes when idle.

 

[efikkan]

People probably have very different standards for what they regard as "stable". There is a big difference in what you can achieve on a brand new chip running well enough to complete some batches of benchmarks vs. during years of actual usage. So if the purpose is a theoretical exercise to see the potential and locate any sweetspots, then running overclocked memory is fine. But if the purpose is to showcase the real world performance the buyer can expect to achieve throughout the product's lifespan, then better stick with the speeds and voltage the memory controller is designed and certified for.

When I regard a system as stable, I don't expect a single system crash during at least 3 months of uptime. What I've seen in development environments, system crashes are extremely rare even with heavily used workstations, especially if they're running Linux. That kind of stability would not be achievable with overclocked memory, not only due to system crashes, but also file corruption.

But validating this level of system stability isn't trivial either. You generally need many different types of tests, and for a prolonged time to draw final conclusions. I've seen for instance what overclocked memory can do to code compilation with gcc and llvm, with just occasional absurd behavior, while passing memory tests and various CPU tests (removing the OC obviously resolved the issue). It was in fact gcc and llvm which were the most reliable workloads to pinpoint the stability issues with Zen 1, and not with a particularly "stressful" load either, which goes to show that hardware issues can absolutely cause problems during light to medium load too.

 

[friocasa]

The "Zen 5%" joke is accurate

 

[HD64G]

Software is the only problem with Zen5. Linux review on the topic of Linux VS Windows performance (https://www.phoronix.com/review/ryzen-9950x-windows11-ubuntu/8) proved that definately. 14% difference between the OSes on average of +70 tests doesn't need any more words. So, the Zen5 arch is clearly a progress over Zen4, the software (win11 updates, chipset drivers) and maybe the AGESA code needs more work. AMD's fault? For sure! But the letter had good news, the post office sent it earlier and couldn't be comprehended properly due to circumstances.

 

[mb194dc]

How about benchmarks on Windows 10 Enterprise?

 

[PierreJG]

It's not good, but it is not bad either. There is a specific market for this CPU. The average person are not gonna pay 15k+ ( I am expecting the price to be close to that) in South Africa, When you can get a 7800x3d for a lot cheaper. Productivity yes maybe but there are also cheaper options. What is the purpose of shaving off 2,3 seconds? If you are in a crunch working that needs it done as soon as possible then yes, Otherwise, I think for the price here it won't be worth it.

 

[igormp]

Software is the only problem with Zen5. Linux review on the topic of Linux VS Windows performance (https://www.phoronix.com/review/ryzen-9950x-windows11-ubuntu/8) proved that definately. 14% difference between the OSes on average of +70 tests doesn't need any more words. So, the Zen5 arch is clearly a progress over Zen4, the software (win11 updates, chipset drivers) and maybe the AGESA code needs more work. AMD's fault? For sure! But the letter had good news, the post office sent it earlier and couldn't be comprehended properly due to circumstances.

I wonder how much input those CPU manufacturers have on Window's core parts, specially the scheduler.
I'm going to believe "not much" since it's not the first time AMD had issues with the NT scheduler, and Intel had to resort to a hw scheduler (something that I personally deem way unnecessary and overkill, but apparently needed).

We have many other hybrid CPUs in other spaces (see ARM mobile devices), and Linux seems to not have much of an issue (Intel's addition of their thread director support barely made a difference in performance), so it indeed seems to be just a Windows issue.
I wonder if that's why Qcom decided to go with a single core type for their Elite SoC (or if it's mostly because Oryon was not designed to be used like so).

Well, I hope MS manages to catch up and allow their scheduler to properly work, after all, this also has implications with their future adoption with ARM devices.

 

[mkppo]

Faster Ram is not better.

7800 C38 isn't supposed to be faster than even 6000. The problem with 7800 is that UCLK sits at 1900 with the 2:1 ratio, which causes a bottleneck, compared to 3000 for the 1:1 6000 setup. 1900 is way too limiting and doesn't allow the 'other half' of the transmission to compensate enough.

If you want more speed than 6200 (or even tight 6000), you have to go 8000 with tighter timings at the minimum. That isn't possible with 2DPC boards and there are very few options for 1DPC boards for x670. This is what i'm hoping x870 will bring (and looks like there's at least one option coming up), as from my earlier tests it's only possible to go faster than tight 6200 is to have a relatively tight 8000 tune.

I wonder why they can't have a 3:2 ratio for MCLK:UCLK. The choice of only 1:1 or 2:1 is limiting and a 3:2 ratio at 8000 would alleviate a lot of Zen 5's bottlenecks especially in gaming.

I'll quote chips and cheese, who mirror my thoughts on the Zen 5 arch "Much of the potential throughput offered by Zen 5’s wider pipeline is lost to latency, either with backend memory accesses or frontend delays."

They really need a new IO, or that divider at the least. For gaming, it's mostly the backend memory access that's really limiting them. Good thing is the X3D variant should, in theory, be very fast and lose a lot less core width to memory latency. If they can combine with the VCache with the rumoured higher clocks (compared to prior X3D implementations), we might have a winner.

7800 C38 isn't supposed to be faster than even 6000. The problem with 7800 is that UCLK sits at 1900 with the 2:1 ratio, which causes a bottleneck, compared to 3000 for the 1:1 6000 setup. 1900 is way too limiting and doesn't allow the 'other half' of the transmission to compensate enough.

If you want more speed than 6200 (or even tight 6000), you have to go 8000 with tighter timings at the minimum. That isn't usually possible with 2DPC boards and there are very few options for 1DPC boards for x670. This is what i'm hoping x870 will bring (and looks like there's at least one option coming up), as from my earlier tests it's only possible to go faster than tight 6200 is to have a relatively tight 8000 tune.

I wonder why they can't have a 3:2 ratio for MCLK:UCLK. The choice of only 1:1 or 2:1 is limiting and a 3:2 ratio at 8000 would alleviate a lot of Zen 5's bottlenecks especially in gaming.

I'll quote chips and cheese, who mirror my thoughts on the Zen 5 arch "Much of the potential throughput offered by Zen 5’s wider pipeline is lost to latency, either with backend memory accesses or frontend delays."

They really need a new IO, or that divider at the least. For gaming, it's mostly the backend memory access that's really limiting them. Good thing is the X3D variant should, in theory, be very fast and lose a lot less core width to memory latency. If they can combine with the VCache with the rumoured higher clocks (compared to prior X3D implementations), we might have a winner.

 

[Gameslove]

So for users already invested in AM4(Ryzen 5000), still no reason to upgrade.

Yea.
Ryzen 7 5800X3D + Radeon RX 7900XTX+64 GB DDR4 3200Mhz

New game.
Black Myth Wukong benchmark:
720p resolution
Low settings
FSR 25%
FG ON
RT OFF

Result: AVG. 490 FPS.

 

[A Computer Guy]

Multithread efficiency WORSE THAN PREVIOUS GEN?! I wonder how they managed that...

Higher core to core latency maybe? It's interesting to see the progression over the years.

(charts from Anandtech)
References: 3950x, 5950x, 7950x, 9950x

 

[DemonicRyzen666]

Your definition of Exact is different to mine then, if you claim software changes have had minor effects, then they are by definition not exact.

I just ran prime 95 blend yesterday for over 6 hrs with 1:1 & 6000MT/S with my old Hynix M die kit, stable no problems. The chip you tested with must be a poor sample thanks to the silicon lottery perhaps?
PBO is enabled & tuned without the new curve shaper mechanism, I leave that on auto for time being hence why the power consumption is approx doubled from 65w TDP - Asrock's implementation of the current agesa.
View attachment 359308

But I can't be bothered arguing anymore, just going to leave this here & move on to testing at 6200MT/S, maybe post results in another thread.

What's with the weird 4.6ghz L3 Cache speed while memory controller is sitting a 3.0ghz???? & infinity fabric is 2133mhz????
Nothings in line with each other the cores are 5.7ghz+

 

[sdedalus83]

What's with the weird 4.6ghz L3 Cache speed while memory controller is sitting a 3.0ghz???? & infinity fabric is 2133mhz????
Nothings in line with each other the cores are 5.7ghz+

Look at the top left entry, the average core clock is 4.687Ghz. L3 clock is always equal to the highest core.

 

[efikkan]

Software is the only problem with Zen5. Linux review on the topic of Linux VS Windows performance (https://www.phoronix.com/review/ryzen-9950x-windows11-ubuntu/8) proved that definately. 14% difference between the OSes on average of +70 tests doesn't need any more words. So, the Zen5 arch is clearly a progress over Zen4, the software (win11 updates, chipset drivers) and maybe the AGESA code needs more work. AMD's fault? For sure! But the letter had good news, the post office sent it earlier and couldn't be comprehended properly due to circumstances.

There should be little doubt that the antiquated "New Technology" kernel is long overdue for a major overhaul, and I'm thinking beyond just tweaking the scheduler. There is also stability issues, security issues and performance issues, the latter of which is more than just being a few percent slower than Linux on average. The performance inconsistency is far more annoying which and the reason why so many people "feel" Linux is faster and less jerky on their computer (especially if it's not the latest and greatest).

But I do appreciate the challenge MS is facing though; the mountain of obscure enterprise software which is very closely knit to archaic APIs. But with long-term software maintenance, if you don't prioritize modernizing continuously, it will only get harder to catch up.

As for AMD's firmware, I doubt that is going to make a big difference. Fixing Windows' kernel is MS' job, not AMD's. (assuming there is no design flaw in hardware)

I'll quote chips and cheese, who mirror my thoughts on the Zen 5 arch "Much of the potential throughput offered by Zen 5’s wider pipeline is lost to latency, either with backend memory accesses or frontend delays."

They really need a new IO, or that divider at the least. For gaming, it's mostly the backend memory access that's really limiting them. Good thing is the X3D variant should, in theory, be very fast and lose a lot less core width to memory latency. If they can combine with the VCache with the rumoured higher clocks (compared to prior X3D implementations), we might have a winner.

First of all, saturating wider execution and larger vector width is primarily a memory bandwidth issue, not a L3 cache hit issue. L3 is after all discarded L2 cache lines, and the cache hits here are primarily instruction cache lines. With optimized workloads we generally don't see heavy L3 cache sensitivity (which is why only select workloads benefits from lots of L3 cache), and especially a heavy AVX workload wouldn't saturate the CPU very well if the code was this bloated.

I will be curious to see whether upcoming Epyc and Threadripper(?) models with more memory channels will scale better in AVX512 workloads, then we'll probably see if the memory bus or the CPU frontend is the bigger bottleneck. I'd expect Phoronix to do a good job exploring this sort of stuff as usual.

 

[mkppo]

First of all, saturating wider execution and larger vector width is primarily a memory bandwidth issue, not a L3 cache hit issue. L3 is after all discarded L2 cache lines, and the cache hits here are primarily instruction cache lines. With optimized workloads we generally don't see heavy L3 cache sensitivity (which is why only select workloads benefits from lots of L3 cache), and especially a heavy AVX workload wouldn't saturate the CPU very well if the code was this bloated.

I will be curious to see whether upcoming Epyc and Threadripper(?) models with more memory channels will scale better in AVX512 workloads, then we'll probably see if the memory bus or the CPU frontend is the bigger bottleneck. I'd expect Phoronix to do a good job exploring this sort of stuff as usual.

I agree with you that it's a mem bandwidth issue when trying to saturate the wider execution engines. I'm aware that poorly written code (eg. games) causes L2 spillover which ends up in L3. What I was stating is that, when executing poor code, a larger L3 reduces the number of memory trips so it loses less core width to memory latency/bandwidth in that scenario.

I'm waiting for the Turin tests as well, a lot of info will come out of that one.

 

[AnotherReader]

I agree with you that it's a mem bandwidth issue when trying to saturate the wider execution engines. I'm aware that poorly written code (eg. games) causes L2 spillover which ends up in L3. What I was stating is that, when executing poor code, a larger L3 reduces the number of memory trips so it loses less core width to memory latency/bandwidth in that scenario.

I'm waiting for the Turin tests as well, a lot of info will come out of that one.

Even exceptionally well optimized code can benefit from more cache if the working set is large enough. Note the higher IPC for the 3D cache CCD of the 7950X3D.

 

[mkppo]

Even exceptionally well optimized code can benefit from more cache if the working set is large enough. Note the higher IPC for the 3D cache CCD of the 7950X3D.

View attachment 359959

Yep, sadly most of the consumer apps don't have a dataset this large. Some server apps do, which is why there's a market for X3D server chips.

 

[DemonicRyzen666]

That CCD to CCD latency is like old zen+ architechture that didn't have an i/o die. The CCD had go all the way to ram from the CCD's memoery controller and through the ram back over through the other dies memoery controller.

The only bonus amd got from those exrta memory controlers that was threadrippers 2000's 144gbs ram bandwidth on qaud chaneel with numa and up to 288gbs on EPYC octo channel.

 

[Frank_100]

There should be little doubt that the antiquated "New Technology" kernel is long overdue for a major overhaul, and I'm thinking beyond just tweaking the scheduler. There is also stability issues, security issues and performance issues, the latter of which is more than just being a few percent slower than Linux on average. The performance inconsistency is far more annoying which and the reason why so many people "feel" Linux is faster and less jerky on their computer (especially if it's not the latest and greatest).

But I do appreciate the challenge MS is facing though; the mountain of obscure enterprise software which is very closely knit to archaic APIs. But with long-term software maintenance, if you don't prioritize modernizing continuously, it will only get harder to catch up.

As for AMD's firmware, I doubt that is going to make a big difference. Fixing Windows' kernel is MS' job, not AMD's. (assuming there is no design flaw in hardware)


First of all, saturating wider execution and larger vector width is primarily a memory bandwidth issue, not a L3 cache hit issue. L3 is after all discarded L2 cache lines, and the cache hits here are primarily instruction cache lines. With optimized workloads we generally don't see heavy L3 cache sensitivity (which is why only select workloads benefits from lots of L3 cache), and especially a heavy AVX workload wouldn't saturate the CPU very well if the code was this bloated.

I will be curious to see whether upcoming Epyc and Threadripper(?) models with more memory channels will scale better in AVX512 workloads, then we'll probably see if the memory bus or the CPU frontend is the bigger bottleneck. I'd expect Phoronix to do a good job exploring this sort of stuff as usual.

That 14% slowdown is a feature of all the embedded spyware. It's not going anywhere.

Retrace your steps with Recall - Microsoft Support

support.microsoft.com

 

[Garrus]

Zen 5 shares the EXACT same IMC as Zen 4, it's the same physical piece of silicon. There's some software changes though that have only a minor effect.

I couldn't even get 6000 stable at stock on my 9900X. What do you suggest how to proceed with the review if 6400 is the comparison baseline? I suspect that at least half my AM5 CPUs will not run 6400 1:1

This is from the AMD Ryzen 9000 reviewer's guide
View attachment 359106


Inded, I'm planning to switch to Zelda for the next rebench. Will probably hve to play a substantial part of the game though, to find a decent scene

That's awesome news. Mario Kart was a Wii U port and runs easily. Zelda is a lot more challenging! Cheers!

 

[sethmatrix7]

Wonder if TPU will do their own comparison

 

[KarymidoN]

Wonder if TPU will do their own comparison

@W1zzard prolly already working on it, dude is relentless.

 

[ARF]

Wonder if TPU will do their own comparison

Is this still slower than Windows 10?

 

[sethmatrix7]

Is this still slower than Windows 10?

No idea, but I’d like to know