Zen6 is almost here ?

[Darby_Echo]

We've heard before Zen6 is to use RDNA3.5 instead of RDNA4, but that it looks to me that this is about desktop parts with minimal iGPU and perhaps 8700G successors.

Now we have further hints, trickling down through [hothardware](https://hothardware.com/news/amd-zen6-ryzen-ccd-details-leak), [wccftech](https://wccftech.com/amd-next-gen-ryzen-zen-6-medusa-ridge-cpus-12-24-32-core-up-to-128-mb-l3-cache/) etc, suggesting that:
* They could have chiplet versions of up to 12 Zen6 or 16x Zen6c cores
* 50% more L3 cache on Zen6 chiplets and 100% more L3 on Zen6c version
* Zen6 AM5 CPUs would go up to 24 Zen6 or 32 Zen6c cores
* extra L3 die cache on top of that for X3D models, possibly on both chiplets

It double-taps two killer features - compact Zen6 cores and X3D cache. If one has whole extra die for L3 cache, then cores can be much more compact without performance impact.
It also looks I/O chiplet and IF are to be a major redesign, since they need way more bandwidth to feed many more cores.

AMD is about to transition to much faster and more compact and energy efficient silicon bridges for communication between chiplets,
so I wonder if they'll plop one between CPU chiplets, thus killing the inter-CCD latency...

This also implies CUDIMM, LPCAMM2 (or similar) and MRDIMM tech support and much beefier IMC.
But as before, APUs are to be left trailing behind CPUs - no X3D cache layers for their iGPUs ?

It seems AMD will start to open their cards in 2H2025, so chips might be out in by 2026 ?

 

[eidairaman1]

I like AMD but this info is speculative

 

[Princess Garnet]

What I'm wondering is if Zen 6 will come as the final generation on AM5, or if it will come on AM6 with DDR6, and if AM5's final generation is a Zen5+ refresh. I'm not sure if that's a thing but I thought I saw it mentioned a while back.

I've heard that CCDs might go up to 12 cores, and along with extra cache all around, it has me excited. But I was considering skipping AM5 anyway so if Zen 6 comes as AM5's last generation, then it would either have a massive uplift over Zen 5, or else it would be Zen 7 (or whatever comes after) that I look towards.

 

[ir_cow]

Fall 2025. Just like clockwork in the roadmap. It might be delayed until early 2026. Either way that is the end of the AM5 platform. DDR6 is years away. Next stop is CUDIMM support.

 

[GerKNG]

i really hope Zen 7 will be on AM5 to get one more significant upgrade in a couple years over the 9800X3D.

 

[Darby_Echo]

I like AMD but this info is speculative

Speculation is a cornerstone of modern CPU design.
Without it, we wouldn't need Spectre mitigations.

 

[N/A]

Why not hybrid 12+16 CCDs.
X3D is no longer on top. But on top the capacity.

 

[damric]

I like AMD but this info is speculative

3D cache on top and bottom

 

[Darby_Echo]

Fall 2025. Just like clockwork in the roadmap. It might be delayed until early 2026. Either way that is the end of the AM5 platform. DDR6 is years away. Next stop is CUDIMM support.

I'm not so sure. RAM doesn't scale that well with process nodes.
DDR5 is first gen that we couldn't see 2x uplift in capacity, hence 24GiB and 48GiB modules.
Frequencies are also ramping up slowly, and they are beco0ming moot point for all but APU systems anyway, since the latency isn't going down,

Also, whole traditional transfer principles are running out of gas, so now they had to resort to CUDIMM clock regeneration etc.
But event that has limited effects. It gets additional margins that could get used mostly by overclockers.
Regular users could see perhaps one notch higher frequencies, if that.

Same thing with M(C)RDIMM. it was supposed to double the bandwidth at the expense of extra register chip on the databus adn extra clock or two latency.
Result ? It doesn't quite double the bandwidth of already slow registered DDR5 (so from 4800-ish to 8800-ish MHz).

No one even has DDR6 in the lab. And even if they had it, they have not much of an idea how to double the bandwidth.

Same with PCIe6. First server stuff for it is yet to arrive. And then we need few years for it to get adopted. And then 3-4 years for it to trickle down in consumer goods.

There is no reason on the horizon for AM6.

Maybe they do AM5+ or trickle-down the 4-channel ThreadRipper stuff etc.

 

[Princess Garnet]

Fall 2025. Just like clockwork in the roadmap. It might be delayed until early 2026. Either way that is the end of the AM5 platform. DDR6 is years away. Next stop is CUDIMM support.

Oh, that's sooner than I would have expected. Since Zen 5 just launched recently, I was thinking AM5's next and final thing would be next year at the earliest. I'm guessing AM6 is more like 2027 at the earliest in any case, and I have no idea if they plan to try and time it with DDR6 as 2027 seems like it might be too early for that to be ready on the consumer side?

If AM6 does use DDR6, that will be the downside for me if I try and skip AM5 and jump onto AM6 early; I'll be paying a lot for RAM since I tend to go for higher capacity. But if Zen 6 and 12 CCD chips are on AM5, maybe I'll jump onto that before the socket switch. I did the same with AM4.

 

[N/A]

If AM6 does use DDR6, that will be the downside for me if I try and skip AM5 and jump onto AM6 early; I'll be paying a lot for RAM since I tend to go for higher capacity. But if Zen 6/12 CCD chips are on AM5, maybe I'll jump onto that before the socket switch. I did the same with AM4.

It makes no sense to disable half the CCD. maybe with just SMT removed 12/12.

 

[ir_cow]

@Princess Garnet Im just guessing based on the road map slides from Zen4. Consider that the final Zen5 will come out by the end of Q2, it is possible we won't see anything until fall 2026 instead. Just depends how much they are ahead of Intel.

 

[Dr. Dro]

It makes no sense to disable half the CCD. maybe with just SMT removed 12/12.

In my opinion, AMD should follow Intel and remove SMT altogether from the next generation architecture. Make them dual CCD 12 cores with 12 threads each side. Much better, CPUs will be snappier, run cooler and won't have that side channel open all the time.

trickle-down the 4-channel ThreadRipper stuff etc.

Unfortunately I don't think Threadripper will ever be affordable again, unless Intel brings back the Core X-series product line and a successor to the X299 chipset. Would happily fork $700 for an 8-core processor that gave me access to AVX-512, ~112 PCIe lanes and 8-channel memory plus another grand for a compatible motherboard. Unfortunately, most people won't, so there's no market reason for that to exist.

 

[LabRat 891]

Zen 6 is a disclosed inevitability.
*Some* of the proposed improvements have been rumored or openly disclosed.

The 2 points that interest me personally
A. Improved (direct) CCD-to-CCD IF communications.
B. New AMD Promontory (presumed, not well-detailed in any rumor)

 

[Darby_Echo]

In my opinion, AMD should follow Intel and remove SMT altogether from the next generation architecture. Make them dual CCD 12 cores with 12 threads each side. Much better, CPUs will be snappier, run cooler and won't have that side channel open all the time.

Why ? SMT doesn't cost zen that much. Only register pool is bigger than it would otherwise be (for register renaming etc).

Unfortunately I don't think Threadripper will ever be affordable again, unless Intel brings back the Core X-series product line and a successor to the X299 chipset.

In some new form it could be the new off-the-shelf high end.
Motherboards aren't that much more expensive and 8- or 10-layer PCB ain't so scary anymore.

Same with beefier I/O chiplet. Given how things are moving, 3Dcaching across the line is coming and multilayer 3D stacking is becoming the norm.
So all of that stuff that made ThreadRipper a monster is slowly trickling into new Ryzen 9s...

 

[Darby_Echo]

B. New AMD Promontory (presumed, not well-detailed in any rumor)

Yeah, they botched that one and then left it neglected.
new Zens got shiny fast PCIe5 and then P21 crippled its link to 4-lane PCie speeds.
To make things worse, they daisy-chained two P21s on "premium" boards X/6/8/70.

IIRC it was meant to have PCIe5 link, but ASSmedia lived to its name and screwed it up.

One would expect from them to go the other way and make that link 2x faster than PCIe5 as it is short and signal integrity could be far better controlled than the lines that PCIE5 was meant for.

This would give all peripherals on a chipset much more weight, which is more pressing with new USB implementations that are several times faster than they used to be.

 

[LabRat 891]

Why ? SMT doesn't cost zen that much. Only register pool is bigger than it would otherwise be (for register renaming etc).

It doesn't cost much in regards to 'overall performance'. Generally, providing some uplift on highly multi-threaded tasks. You're 'not wrong'.
However, it's pretty hard to argue against its removal when disabling SMT reliably improves latency. IIRC, "X3D mode" being offered on newer mobos, is mostly just disabling SMT -and, that's just an easy example.

In some new form it could be the new off-the-shelf high end.
Motherboards aren't that much more expensive and 8- or 10-layer PCB ain't so scary anymore.

Especially with PCIe 5.0, the board design and ReDrivers necessary to facilitate the expansion, get hugely expensive. Not to mention the sheer trace/pin density around the socket...

Yes, we could theoretically get a 'gimped' platform like PROM21, for 'not-EPYC'. Where, only the physically-closest expansion is 'full speed' and the rest is 'fanned out' at Gen4 and Gen3, with PROM21(s) acting as both repeater and fanout.

Same with beefier I/O chiplet. Given how things are moving, 3Dcaching across the line is coming and multilayer 3D stacking is becoming the norm.
So all of that stuff that made ThreadRipper a monster is slowly trickling into new Ryzen 9s...

Whether I fully agree with that point or not, you've kinda re-stated the reason TR is 'depreciated'.
Everything that any 'volume' customers would possible 'need' is coming to, or already has made it into the 'desktop platform'.
Anything that a 'boutique' (edge case, etc.) customer might need/want, they will pay for in actual EPYC.

 

[Darby_Echo]

Anything that a 'boutique' (edge case, etc.) customer might need/want, they will pay for in actual EPYC.

EPYC is geared for efficiency. CPU compute per Watt. And extreme connectivity.Not raw speed.
Compared to Ryzen 9xxx, EPYCs per-core speed is bad and its price is several times per-core.

I can totally see 4-channel DDR5 on LPCAMM2-like sticks as a new norm.

If for nothing else, core count is exploding, same with their vector units and without extra RAM bandwidth they simply can't breathe, so something will have to give.
IIRC LPCAMM2 is meant to work in a pair at the extreme (2 sticks with 2 channels each)...

 

[Hyderz]

I think zen6 will be the last on am5 platform…. But I really think AMD should increase the core count for its mainstream Ryzen 5 with 8 cores now and 10 with Ryzen 7 and high end Ryzen 9 with 16 cores no need for a 12 core cpu now.
Would AMD do this though? Probably not
But it would give customers a better impression of its future cpu stack knowing AMD is increasing its core count… also mainstream users also want to do content creation, streaming etc… Cpus cost a lot for 12 cores and up

 

[LabRat 891]

Yeah, they botched that one and then left it neglected.
new Zens got shiny fast PCIe5 and then P21 crippled its link to 4-lane PCie speeds.
To make things worse, they daisy-chained two P21s on "premium" boards X/6/8/70.

IIRC it was meant to have PCIe5 link, but ASSmedia lived to its name and screwed it up.

I'd say more "bit off more than they could chew then, "settled for less" IIRC, ASmedia's USB4 implementation ended up similar
(though, not entirely due to their own failings. IIRC, Intel decided to come in and complicate things for ASmedia and USB4)

One would expect from them to go the other way and make that link 2x faster than PCIe5 as it is short and signal integrity could be far better controlled than the lines that PCIE5 was meant for.

This would give all peripherals on a chipset much more weight, which is more pressing with new USB implementations that are several times faster than they used to be.

Yes/No. From the perspective of 'workstations and servers' (Enterprise), you're correct.
AM5 is a consumer platform. It's not built to be 'full fat'; it's built to be 'capable enough and affordable enough to to sell in volume.

On AM4, we got X570. -Literally, the IOD from Zen2/3, turned into a PCH. -The closest thing to Threadripper Lite we'll likely ever see, IMO.
OToH, all of AM5's 'chipsets' are (the same) B550-like "Promontory" ("21" Version 2, Revision 1?). AM5's platform does not and likely never will have a 'full fat' equivalent.

I'm just as displeased about the situation, but I can see "the why".

I think zen6 will be the last on am5 platform…. But I really think AMD should increase the core count for its mainstream Ryzen 5 with 8 cores now and 10 with Ryzen 7 and high end Ryzen 9 with 16 cores no need for a 12 core cpu now.
Would AMD do this though? Probably not
But it would give customers a better impression of its future cpu stack knowing AMD is increasing its core count… also mainstream users also want to do content creation, streaming etc… Cpus cost a lot for 12 cores and up

They are.

AMD Zen 6 Medusa Ridge Processor Leak Reveals 12-Core CCD Architecture

Moore's Law is Dead shared details about AMD's upcoming Zen 6 Medusa Ridge processor. The leak suggests that the Medusa Ridge will feature a 12-core Core Complex Die (CCD).

www.guru3d.com

Single-CCD SKUs can be up to a 12-core. 2x12-core CCDs will be the 'biggest' SKU.

There has also been disclosed improvements to intra- and inter- CCD communications, with a direct CCD-to-CCD link being added.

100% rumor and hopeful thinking: We might also finally get X3D cache on both CCDs (as AMD has had in-lab since Ryzen 5000series)

AMD shows off unreleased Ryzen 9 5950X3D CPU with 192MB of 3D V-Cache - VideoCardz.com

AMD showcases prototypes of unreleased Ryzen CPUs with 3D V-Cache The company has invited the team from Gamers Nexus for a tour of their secret Ryzen labs. The latest video from Gamers Nexus sheds light on AMD’s journey of returning into a competitive CPU space with the first Ryzen CPUs. It was...

videocardz.com

AMD says there are no technical reasons for not having an X3D processor with 3D V-Cache on both CCDs, but we probably won't see such a dual-stacked chip anyway

Doubling the cache, in this case, probably wouldn't improve gaming performance.

www.pcgamer.com

 

[A Computer Guy]

So all of that stuff that made ThreadRipper a monster is slowly trickling into new Ryzen 9s...

Maybe I'm being a bit pessimistic but I have real doubts AM5+ Ryzen 9's will end up seeing...

1. More than 16 homogeneous cores
2. Quad channel (or better) RAM
3. Support for Registered ECC for really large amounts of memory
4. A significant increase in PCIe lanes
5. Motherboards with decent PCIe expansion slots like we had in prior generations

I think ThreadRipper still fills a niche between Ryzen/AM5-Epyc and Server-Eypc but it's expensive enough mostly you need or should be making money from using it to justify the cost. At least perhaps most users aren't casually buying ThreadRipper but I could be wrong.

Unfortunately I don't think Threadripper will ever be affordable again...

I saw a nice ebay special the other day for a 5995WX (64 core) + 128GB ECC + Fancy Motherboard for under $4000.00. I was very tempted but I recently had an expensive car repair so it was a no go on that deal.

​

 

[LabRat 891]

Maybe I'm being a bit pessimistic but I have real doubts AM5+ Ryzen 9's will end up seeing...

More than 16 homogeneous cores

Very likely happening. 12-Core CCDs are the current rumor.

Quad channel (or better) RAM

Arguably, already happened. DDR5 'split up' the existing dual channel architecture. Smaller/narrower channels clocked way higher, has gotten us to 3+ channel RAM, of generations gone by.

Support for Registered ECC for really large amounts of memory

Surprisingly, many AMD platforms have/have had 'unofficial' (unregistered-unbuffered) ECC support.
Also, 48GB DIMMs have helped.

A significant increase in PCIe lanes

AFAIK
What AM5 can physically support would be full Gen5 w/ MUCH BETTER Gen4 and Gen3 fanout through the 'chipset'.
-'Reuse' of the 7000's or 9000's IOD (ala X570) or, ASmedia making a 3rd Generation Promontory (w/ Gen5x4 uplink) could make that real.

Theoretically, if a new AMD Promontory supported integral USB4, then the 2 PROMs in higher-end boards (currently, in series), could be sat in parallel. -Each, with their own Gen5x4 uplink and, each 'fanning out' those Gen5x4 lanes to Gen3 and Gen4 lanes, w/o bottleneck.

Motherboards with decent PCIe expansion slots like we had in prior generations

It can be done. It is not, generally. MSI seems to the only AIB that's actively tried to not gimp expansion.
Partially, I think it's 'cheaper' to add M.2 M-key slots, than full PCIe slots.
The traces and overall conductor length are generally shorter, and NVMe controllers, etc. are typically a near-0 add for length/impedance. IOW, ReDrivers are less-necessary and trace routing complexity can be somewhat reduced.
Ex. Gen5 'slots' are SMD and require redriving, beyond the nearest-to-SoC slot.

I think ThreadRipper still fills a niche between Ryzen/AM5-Epyc and Server-Eypc but it's expensive enough mostly you need or should be making money from using it to justify the cost. At least perhaps most users aren't casually buying ThreadRipper but I could be wrong.

ThreadRipper hardly even exists, in AMD's marketing. It was never going to be a 'high volume' market, and AMD's (expectedly) neglected it.
As much as I don't like how Intel makes decisions, Intel abandoned HEDT for very definite reasons.

 

[qxp]

What would be cool, and could be done with AM5 is a combination of "Strix Halo AI MAX+" and "Xeon Max". I.e. put 64GB HBM and Strix Halo style CPU+GPU with more cores on the same module that you put into AM5. Use existing RAM slots for high-capacity memory, for say, 1TB of RAM total. Could be slightly slower than DDR5. Then you can run full AI models directly, while doing graphics.

 

[freeagent]

Zen 5 rips lol.. Zen 6 should be pretty intense I would think. Pretty sure it will be on AM5.. better be!

 

[Ruru]

Still kickin' with 5800X. 8)