Persistance in the same explained in detail opinion isn't egoistic, your stance against me as a person was. Let's seperate some possibly false opinions from persons who might be correct in most of their thoughts and beliefs in their life eh?
I fully understand the logic behing your argument since the start of our dialogue. Be sure of it.
Then why not make a discussion that makes sense? You repeated incorrect information over and over even with multiple members telling you in multiple ways you are incorrect.
Answer to me though pls: if a cpu manufacturer decides to stay in same arch when going into smaller manufacturing procedure and simply up the clocks to reach the same TDP as previous gen of its CPUs, doesn't it give more power?
I will respond to this with another question. If you have a 130nm clawhammer 1M K8 based CPU and you push 1.45v through it at 2.4ghz and take a 65nm lima K8 CPU and push 1.45v through it at 2.4ghz which consumes more power? Which chip is faster? They are essentially the same lithography one added a DDR2 memory controller the other has more cache. Both will consume the same amount of power at the same clockspeed and voltage, both will perform nearly identical. In the real world both actually clock very similar the latter only gaining a few hundred mhz with the best overclocks out there.
So to answer what you are saying there are multiple things that have to happen to make any of what you said even possible. First the new manufacturing process has to actually lower voltage, otherwise TDP will remain the same. The architecture has to actually scale higher (k8 is a good example of peaking a design). Not to mention what is you definition of more power? PD840EE was
faster than the PD940, yet the latter was based off of a die shrink. I can overclock a PD805 faster than most of the 9x0 series duals, yet it is an older bigger die. A lot of these designs have a max clockspeed regardless of die size; netburst, K8, K10, C2D's all of these litho's had a max speed that shrinking the die didn't change. They offered the same performance as their predecessor if nothing else was changed (most gains you saw were architecture and cache size increases).
Now, leaving the personal attack of yours aside (that caused my somewhat strong answer above), let's see into the near future (about half a year from Zen launch) to look for proofs.
Again the die shrink will change nothing in physical performance. All it allows is more transistors in the same surface area, if the manufacturer chooses to redesign and add more transistors (change the architecture) at that point you will see a performance change. You keep adding multiple changes and calling it all a die shrink. Not all die shrinks add jack shit if you will. In fact most inter-design die shrinks add next to no performance.
