AMD's Ryzen Cache Analyzed - Improvements; Improveable; CCX Compromises

[akumod77]

Where did you get this graphs from ?

I got it from Thailand (i think) tech website Zolkorn. Here's the link http://translate.google.com/transla...ntel-core-i7-7700k-mhz-by-mhz-core-by-core/4/

 

[Grings]

Im seeing too many badly theorycrafted reasons for that bad gaming performance (that disabling smt fixes)

 

[Joss]

I got it from Thailand (i think) tech website Zolkorn. Here's the link http://translate.google.com/translate?hl=en&sl=auto&tl=en&u=http://www.zolkorn.com/reviews/amd-ryzen-7-1800x-vs-intel-core-i7-7700k-mhz-by-mhz-core-by-core/4/

That is a very interesting test, thanks.

 

[geon2k2]

Missing the point there. It can be 2 threads and still bottleneck if the software tries to move the thread from CCX0 to CCX1.
Which is something that Games and OS do quite often to balance load among cores.
By doing that will have to move the data from CCX0 L3 Cache to CCX1 L3 Cache which will cause the bottleneck because of the ultra slow L3 interconnect.
The solution should be in sight, they just to make the Windows scheduler aware of the design and move thread only in the CCX that thread originates.
That way it eliminates moving data between L3 caches for both modules.

This hopefully can be confirmed benching a game that doesn't use more than 4 threads and disable SMT and one of the CCX on the Ryzen 7.
That eliminates all the above scenarios.

If this is the case, why on earth didn't AMD just send an email to Microsoft to modify the scheduler in the way they wanted, just before the launch or even better, why they didn't release a driver. In the old days for Athlon X2 there was a driver called dual core optimizer.

 

[Kanan]

If this is the case, why on earth didn't AMD just send an email to Microsoft to modify the scheduler in the way they wanted, just before the launch or even better, why they didn't release a driver. In the old days for Athlon X2 there was a driver called dual core optimizer.

Too busy optimizing Ryzen.

 

[mouacyk]

Too busy optimizing Ryzen.

And not enough time beta-testing their new CPU with production software/games to see how they perform in the real world? Engineers and their clean rooms... puhhh!

 

[TheLaughingMan]

If this is the case, why on earth didn't AMD just send an email to Microsoft to modify the scheduler in the way they wanted, just before the launch or even better, why they didn't release a driver. In the old days for Athlon X2 there was a driver called dual core optimizer.

Well that was different. That was created to correct an issue with older game titles that were programmed to run on 1 thread only, but left the scheduling up to Windows. *My memory is a little fuzzy* but I recall the two cores without the optimizer would occasion get into a race case which would stall the game and sometimes crash it. The optimizer fixed that issue and allowed for games and programs that didn't care if there was more than 1 core to run smoothly.

As I understand it**

Now the issue seems to be that as tasks are migrating from core to core is causing a lost in data access. If a task was on core 1 CCX 1 and got picked up by core 7 on CCX 2, all of the data related to that task in the L3 cache is gone. At that point the chip can either copy over the data from the L3 cache on CCX1 through the data fabric (22 GB/s shared with the memory controller) or let it get created naturally as the task starts from scratch with code paths in the L1 and L2 and finally the L3 when needed. Now multiple that happening 1000 fold because a game doesn't care what core is handling the math. This is what potentially is causing the drop in performance for some games.

What they have to do is either limit which logical cores can pick up a task or rework how the CPU handles these kinds of data shifts. Fixing the data fabric bandwidth, unifying the L3 cache into a true single 16 MB cache, of fixing the latency issue with memory would need to be fixed in future generations of the chip.

 

[Ramin Rostami]

Above writen is wrong and fake

Archtectural and design completly diffrance in ryzen cpu and intel

There are many reson like

L3 cash in 6900 is 1 unit but L3 cash is 16 unit (1 for each block)

 

[TheGuruStud]

This stuff is cute. I already saw a cache benchmark where ryzen annihilated Intel's speeds (almost 2x sometimes). There was some latency issue, but it looked nothing like this goofball crap.

 

[Steevo]

Above writen is wrong and fake

Archtectural and design completly diffrance in ryzen cpu and intel

There are many reson like

L3 cash in 6900 is 1 unit but L3 cash is 16 unit (1 for each block)

Please don't repost. Also, making your post bold will do nothing. Source of your information would be good, otherwise it will be ignored and continued reposting may anger the ban stick gods.


Lastly, why would AMD make their cache non-contiguous when that would create extra overhead and slow down the read and write speed as it would have to wait for data lines to be cleared (grounded or terminated to make sure no residual voltage created a false bit) between each segment being read or written to? Cache works on the same physics as all other memory systems.

 

[nem..]

*Article translated

Nothing better than getting up on a Sunday and keep talking about Ryzen, and if we already know that the platform is plagued with problems with RAM, because manufacturers have released their motherboards with BIOS beta, they are causing numerous problems with memory RAM, we now know that these problems greatly affect CPU performance.

These problems, present in all assemblers, such as MSI, Gigabyte, ASRock or Asus, has to do with RAM, which has problems working at its maximum speed, so depending on the motherboard may only work at 1866 MHz or 2400 MHz (as in our case) instead of the 3400 MHz that reaches the memory, and it is when we know that the memory influences much in the final performance, being able to see as in the software of benchmarking Geekbench, in the mononuclear test , Moving from a memory of 2133 MHz @ 3466 MHz implies no less than 10 percent extra performance.

In games, the same thing happens. With The Witcher 3, along with a GeForce GTX 1080 graphics, Full HD resolution and maximum graphics quality (with Hairworks off), we can see how the game reaches 92.5 FPS with a RAM DDR4 @ 2133 MHz , While if this memory is 3200 MHz we see how we get a gain of 14.9 FPS that makes us reach 107.4 FPS.

In this way, the first Ryzen reviews all score the same when using the same boards or memory modules, so it will not be until the motherboard manufacturers solve the problems when we can see the actual performance of the CPUs, Unlike Intel, the speed of memory does imply large differences in performance.

thnx google translate xd
Source:
Http://www.eteknix.com/memory-speed-large-impact-ryzen-performance/
Https://elchapuzasinformatico.com/2017/03/la-velocidad-la-ram-fuerte-impacto-rendimiento-amd-ryzen/ ..

 

[Grings]

Above writen (high latency on L3 cash of rysen) is 100% wrong and fake

Archtectural and design completly diffrance in ryzen cpu and intel

There are many reson like

L3 cash in 6900 is 1 unit but L3 cash is 16 unit (1 for each block)

This is a forum, not a scrolling live chat, we can see your first (and second) post already

 

[Steevo]

Sorry i am new here

In rysen L3 cash not share cash in 1 unit(like intel)
In rysen L3 cash is 16 unit so read from 16 diffrent unit takes more than 1
But volume size on rysen is 16 times more than intel 6900

I hope i can explain anf understant above issue reason

I already explained it, irregardless of memory technology what matters are

1) Data lines (physical traces or wires allowing data to send or receive) and how many there are, and we have no idea as the architecture is not detailed to the public.
2) Clock rate (How fast the data is accessed) again we don't know the specifics, but through extrapolating data and using exploratory data sets we can gain some insight.
3) Latency (how many clock cycles between a request to read and the actual data showing up on the data lines) and we can figure this out if we know other things about the processor or by allowing a program to run and copy differing data sizes into a core or cache and then asking it to be read back and counting the number of clock cycles between.


What we don't have access to yet is a few key components and some software control that may allow us to force data into one cache, and allow us to copy between caches to determine the extra latency introduced by the transfer.

1 or 16 does NOT matter.

 

[ender79]

Ok, in fact ryzen R7 is a Intel Core2Quad in AMD vision.
So you ask AMD for a octa core processor and we have now a dual quad core .
The design problem with 2 CCX interconnected trough an internal bus is a crime for gaming, maybe 10 years ago was a clear innovation.

Anyway this design can't be fixed by a BIOS update, even with more accurate values from AIDA64 beta and lower latency , the gaming on 8 core Ryzen will have to suffer. Games can be patched to use the main thread on one CCX and AI and others on second CCX, but that won't fix 100% the gaming experience.

Rysen 4 core probably will not suffer from the same issue, even if I read well the graph, the problem exist over 4M L3 also , but 4 core ryzen will be the best option for budget gamers.

 

[geon2k2]

My understanding from hardware.fr is that the CCX complex runs at the same frequency as the memory, and somehow the bandwidth is shared between inter module communication and memory access.

This is the reason for which higher memory frequency will provide much better results as the bandwidth for inter-module communication increases with frequency. From 2133 to 3200 the bandwidth for internal communication increases from 34GB/s to 51GB/s, and that's why the witcher 3 benchmark posted above scales so well, not necessarily due to faster memory, which by itself has little impact as we saw numerous times, but because the communication between modules increases drastically with better memory frequency.

I'm waiting with more interes the R5 1400x. The the 1600x (6 core) will probably be plagued by the same issue.

 

[qubit]

Namely, the fact that there seems to be some problem with Ryzen's L3 cache and memory subsystem implementation.

This seems to be the core of the problem and I'm not sure if a microcode update can fix this. If not, then a Ryzen version 2 silicon will be needed, which is a shame since it gives Intel the chance to stay one step ahead of them again. The best competition will happen if AMD can leapfrog Intel and that hasn't happened since 2005 with the Athlon64.

I hope AMD give customers a generous trade-in program if such a revision is released. This will significantly boost confidence in the brand and make customers feel well looked after.

 

[Steevo]

Without further testing (whats the penalty matrix for thread core change*) we are all guessing, educated guesses for the most part, but guessing.

Thread handling is the job of the OS primarily unless the executables are updated to handle their own, and most just look to see how many threads to spawn based on cores and no further. But like Bulldozer if the OS assigns threads based on the CCX architecture there will be little or no penalty as the thread won't move unless it can benefit from the move.

* CCX0 C1 --> CCX4 C2 move costs 46 cycles of wait time for example, but CCX0 C0 to CCX1 C1 only costs 22 cycles. How many wasted cycles between every CCX and every core in every CCX. Does the penalty increase or remain the same depending on other CCX/cores being busy?


More information is needed before we can make broad statements, a better and more efficient thread handling/dispatching algorithm may increase the performance a lot.

 

[TheLaughingMan]

These are not the chips for pure gamers either way. We need to wait and see what the Ryzen 5 1400 and 1500 have to offer as the 4 core / 8 thread chips. Will they clock higher, will they scale in performance better, and they will also have the benefit of being released on a platform that has some time to mature and work out some of these kinks.

 

[mastrdrver]

This seems to be the core of the problem and I'm not sure if a microcode update can fix this. If not, then a Ryzen version 2 silicon will be needed, which is a shame since it gives Intel the chance to stay one step ahead of them again. The best competition will happen if AMD can leapfrog Intel and that hasn't happened since 2005 with the Athlon64.

I hope AMD give customers a generous trade-in program if such a revision is released. This will significantly boost confidence in the brand and make customers feel well looked after.

And Windows apparently has problems allocating system resources correctly for Ryzen:

https://forums.anandtech.com/threads/ryzen-strictly-technical.2500572/page-2#post-38770630

 

[Renald]

To add some info on this test, Hardware.fr is saying in this article that they perfectly knows that AIDA64 is not suitable for Ryzen, but they ran the test anyway just to have some base of work and show the real problem which is demonstrated in the graph later in this article.

After confirming that there was a problem with L3 cache, they ran a custom-made program which was intended to perform cache usage incrementally higher and test latency. They clearly stated that the creator of the program did not checked it before using it on Ryzen, just to be clear.

The result in ns shown in green are the results of this custom-made test.
Sum up : as soon as a thread is moved from a core to another, it's cache is immediately pushed into this high latency cache, creating a huge drop in performance. The CCX architecture is not helping, neither bandwidth between them.

Since then, they try to isolate this behavior to prove Ryzen sensibility to core parking(which is not yet still proven or "that simple"). Not an easy task it seems, because of Windows 10 scheduler. And still, many manufacturers are not yet ready, and come to mess around with not suitable drivers and patches... Kinda annoying :/

Sorry for my poor English, and HFR team, just whip me if I'm saying some crappy things. I'm still (and you too as I understood), not quite sure what is the real underlying problem in the end

 

[Wark0]

*Article translated

Nothing better than getting up on a Sunday and keep talking about Ryzen, and if we already know that the platform is plagued with problems with RAM, because manufacturers have released their motherboards with BIOS beta, they are causing numerous problems with memory RAM, we now know that these problems greatly affect CPU performance.

These problems, present in all assemblers, such as MSI, Gigabyte, ASRock or Asus, has to do with RAM, which has problems working at its maximum speed, so depending on the motherboard may only work at 1866 MHz or 2400 MHz (as in our case) instead of the 3400 MHz that reaches the memory, and it is when we know that the memory influences much in the final performance, being able to see as in the software of benchmarking Geekbench, in the mononuclear test , Moving from a memory of 2133 MHz @ 3466 MHz implies no less than 10 percent extra performance.

View attachment 84862


In games, the same thing happens. With The Witcher 3, along with a GeForce GTX 1080 graphics, Full HD resolution and maximum graphics quality (with Hairworks off), we can see how the game reaches 92.5 FPS with a RAM DDR4 @ 2133 MHz , While if this memory is 3200 MHz we see how we get a gain of 14.9 FPS that makes us reach 107.4 FPS.

In this way, the first Ryzen reviews all score the same when using the same boards or memory modules, so it will not be until the motherboard manufacturers solve the problems when we can see the actual performance of the CPUs, Unlike Intel, the speed of memory does imply large differences in performance.

View attachment 84861

thnx google translate xd
Source:
Http://www.eteknix.com/memory-speed-large-impact-ryzen-performance/
Https://elchapuzasinformatico.com/2017/03/la-velocidad-la-ram-fuerte-impacto-rendimiento-amd-ryzen/ ..

Oh no... not this thing again ... this figures are from MSI that reused the same benchmark from an older MSI slide with benchmark on ... Z270 ... :lol:

 

[Wark0]

And Windows apparently has problems allocating system resources correctly for Ryzen:

https://forums.anandtech.com/threads/ryzen-strictly-technical.2500572/page-2#post-38770630

No, it's not the case with final bios :

http://forum.hardware.fr/hfr/Hardware/hfr/dossier-1800x-retour-sujet_1017196_20.htm#t10089095

 

[Renald]

And Windows apparently has problems allocating system resources correctly for Ryzen:

https://forums.anandtech.com/threads/ryzen-strictly-technical.2500572/page-2#post-38770630

(Sorry for double post)
They looked into it at Hardware.fr and said that the guy is not saying the truth, and that Core0/1/2/3 are sharing 8Mb and Core4/5/6/7 are sharing another 8Mb.
http://www.hardware.fr/articles/956-1/amd-ryzen-7-1800x-test-retour-amd.html ==> Page 80 if you speak french

This line : "****---- Unified Cache 1, Level 3, 8 MB, Assoc 16" Says : Core 0/1/2/3 share 8MB of L3
Or here "**------ Unified Cache 0, Level 2, 512 KB, Assoc 8" Says : Core 0/1 share 512KB of L2
and so on.

So it's some crappy analyze here, and they are pretty technical guys so they won't affirm it's crap unless it really is.

 

[Wark0]

Since then, they try to isolate this behavior to prove Ryzen sensibility to core parking(which is not yet still proven or "that simple"). Not an easy task it seems, because of Windows 10 scheduler. And still, many manufacturers are not yet ready, and come to mess around with not suitable drivers and patches... Kinda annoying :/

Ryzen with SMT is not more sensible to core parking than Intel with SMT. Both don't like scheduler with core parking.

The fact is that on Windows 10, Core Parking is OFF in balanced mode with an Intel CPU (BDW-E, SKL for example), and ON on Ryzen. So you have to switch it off manually in order to compare apple to apple.

 

[C_Wiz]

I can compare them between your own results, which where all done with the same configuration between the 6900K and the 1800X, right? That's what I compare in the article.

Yes our values are comparable, you got that right don't worry.

I was talking to someone else at that time who was comparing that value (98ns) to Aida64 stock values, which was not ok because of the clock being different .

Time isn't as we would like, hence why only now I'm here and improving the article.

Yeah we've been working non-stop on Ryzen post launch, trying to figure out the issues we were seeing, time is way too short and sleep levels way too low

For me, that was the whole point of the post. AIDA 64 is a benchmarking utility, but until it has been "fixed", as in, properly optimized for Ryzen, I think it presents itself as a great opportunity to see Ryzen's behavior on non-optimized workloads (ie, what all games currently are).

Yeah again, to be 100% clear, we double checked with FinalWire what was accurate and wasn't according to them, our deep dive is exactly about trying to work around why some of the values reported aren't accurate, and go from there. It's by starting to track this down that we got to the CCX interconnect bandwidth limitation, the way split caches are handled in single thread etc etc.

Thanks for fixing your summary !

G.