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Intel in an interview with Hardwareluxx shed more light on its second generation Xe graphics architecture, codenamed "Battlemage." There will be two key variants of "Battlemage,"—Xe2-LPG and Xe2-HPG. The Xe2-LPG (low-power graphics) architecture is a slimmed-down derivative of "Battlemage" that's optimized for low-power. It is meant for iGPUs (integrated graphics), particularly upcoming "disaggregated" Intel Core processors in which the iGPU exists on Graphics Tiles (chiplets). The iGPU powering the upcoming Core "Meteor Lake" processor is rumored to meet the full DirectX 12 Ultimate feature-set (something Xe-LP doesn't), and so it's likely that Xe2-LPG is getting its first outing with that processor. The Xe2-HPG (high performance graphics) architecture is designed squarely for discrete GPUs—either desktop graphics cards, or mobile discrete GPUs hardwired into laptops.
In the interview, Intel talked about how its first-generation Xe graphics IP had at least four separate product verticals based on the scalability of the product, and the specific application (Xe-LP for iGPUs and tiny dGPUs, Xe-HPG for client- and pro-vis discrete GPUs, Xe-HPC for scalar compute processors, and Xe-HP for data-center graphics). The company eventually axed Xe-HP as it felt the Xe-HPG and Xe-HPC architectures adequately addressed this segment. With AXG (accelerated compute group) being split up between the CCG (client computing group) and DCG (data-center group); Xe2-LPG and Xe2-HPG will be developed primarily under CCG, with a client and pro-visualization focus; while Xe-HPC will be developed as a scalar-compute architecture by DCG, which effectively leaves the Intel Arc Graphics team with just two verticals—to deliver a feature-rich iGPU for its next-generation Core processors, and a performance discrete GPU lineup so it can eat away market-share from NVIDIA and AMD—hopefully with better time-to-market.
Had everything gone to plan, particularly cost-effective availability of a 7 nm-class foundry node, "Battlemage" was supposed to take off in 2022. Instead, the the group crawled with a first-gen "Alchemist" launch in 2022, by which time NVIDIA and AMD had advanced their architectures (to "Ampere" and RDNA2, respectively). "Now as we go forward in our roadmap, we realized this is a very, very expensive - the QA process and the segmentation. The Thinking was we needed to differentiate our IP and customize it per each segment," said Tom Peterson, an Intel Fellow from the former AXG. "[…] We are going to just have one thing and it goes everywhere unmodified. That's more the strategy we are looking at going forward. And that's because, that's really the only way to get IP reused to really work," he added.
View at TechPowerUp Main Site | Source
In the interview, Intel talked about how its first-generation Xe graphics IP had at least four separate product verticals based on the scalability of the product, and the specific application (Xe-LP for iGPUs and tiny dGPUs, Xe-HPG for client- and pro-vis discrete GPUs, Xe-HPC for scalar compute processors, and Xe-HP for data-center graphics). The company eventually axed Xe-HP as it felt the Xe-HPG and Xe-HPC architectures adequately addressed this segment. With AXG (accelerated compute group) being split up between the CCG (client computing group) and DCG (data-center group); Xe2-LPG and Xe2-HPG will be developed primarily under CCG, with a client and pro-visualization focus; while Xe-HPC will be developed as a scalar-compute architecture by DCG, which effectively leaves the Intel Arc Graphics team with just two verticals—to deliver a feature-rich iGPU for its next-generation Core processors, and a performance discrete GPU lineup so it can eat away market-share from NVIDIA and AMD—hopefully with better time-to-market.
Had everything gone to plan, particularly cost-effective availability of a 7 nm-class foundry node, "Battlemage" was supposed to take off in 2022. Instead, the the group crawled with a first-gen "Alchemist" launch in 2022, by which time NVIDIA and AMD had advanced their architectures (to "Ampere" and RDNA2, respectively). "Now as we go forward in our roadmap, we realized this is a very, very expensive - the QA process and the segmentation. The Thinking was we needed to differentiate our IP and customize it per each segment," said Tom Peterson, an Intel Fellow from the former AXG. "[…] We are going to just have one thing and it goes everywhere unmodified. That's more the strategy we are looking at going forward. And that's because, that's really the only way to get IP reused to really work," he added.
View at TechPowerUp Main Site | Source