Intel to Start High-Volume EUV Production in Ireland, Intel 4 Node Enters Mass-production

[btarunr]

Intel Foundry Services (IFS) today announced that it will commence mass-production on its first silicon fabrication node that leverages extreme ultraviolet (EUV) lithography, Intel 4. On September 29, the Intel 4 node will start rolling at the company's facility in Leixlip, Ireland, dubbed Fab 34. CEO Pat Gelsinger, Dr. Ann Kelleher, general manager of Technology Development at Intel, and Keyvan Esfarjani, chief global operations officer, will be present at a ceremony commemorating production of the first wafers.

Intel 4 is an advanced foundry that leverages EUV, and offers both transistor densities and electrical characteristics comparable to TSMC's 5 nm-class and 4 nm-class foundry nodes. Among the first chips to be built are the compute tiles of the company's Core "Meteor Lake" processors, which contain their next-generation CPU cores. Compared to the current Intel 7 node, Intel 4 offers double the area scaling for logic libraries, a 20% iso-power improvement, and introduces the new metal-insulator-metal (MIM) capacitor.



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[kondamin]

Is this for the gen 14 mobile parts entering the market in a couple of months?
seems a bit fast no?

 

[Daven]

Is this for the gen 14 mobile parts entering the market in a couple of months?
seems a bit fast no?

Reading this will answer your question.

Intel Meteor Lake Technical Deep Dive

Today Intel is taking the wraps off their Meteor Lake Architecture. Our tech preview tells you everything you need to know about Intel's new ideas that will power the company's processors for years to come. Just like AMD, Intel is betting on chiplets, which combine multiple silicon dies into a...

www.techpowerup.com

 

[pressing on]

Is this for the gen 14 mobile parts entering the market in a couple of months?
seems a bit fast no?

No longer gen 14, gens have been dropped. Now Core Ultra processors on Meteor Lake. Performance per watt is the priority on ML, let's see what performance looks like when retail units are reviewed.

 

[Squared]

If these are coming to market in December, then wouldn't the fab have started producing early versions of the chips months ago? And what's with all the engineering samples and demos if no chip has been produced?

I'm picturing that maybe another fab has been producing the chips and now this one is ready to produce them as well.

 

[TristanX]

So, Intel built whole high-volume fab only to produce small compute tiles (70 sqmm each) ? Hard to believe, as capacity is much bigger to handle such demand. They will probably release also MTL-S with bigger compute tile

 

[FoulOnWhite]

So, Intel built whole high-volume fab only to produce small compute tiles (70 sqmm each) ? Hard to believe, as capacity is much bigger to handle such demand. They will probably release also MTL-S with bigger compute tile

Isn't the compute tile the actual cores? TSMC is i believe building the GPU dies.

 

[pressing on]

So, Intel built whole high-volume fab only to produce small compute tiles (70 sqmm each) ? Hard to believe, as capacity is much bigger to handle such demand. They will probably release also MTL-S with bigger compute tile

Intel is expecting to sell tens of millions of Meteor Lake mobile processors, so yes a high-volume fab is needed for that.

 

[kondamin]

Reading this will answer your question.

Intel Meteor Lake Technical Deep Dive

Today Intel is taking the wraps off their Meteor Lake Architecture. Our tech preview tells you everything you need to know about Intel's new ideas that will power the company's processors for years to come. Just like AMD, Intel is betting on chiplets, which combine multiple silicon dies into a...

www.techpowerup.com

They are still doing the whole (generation)(class)(productnumber) thing while it’s a totally Different chip for mobile than it is desktop

all they dumped is the I moniker.

 

[pressing on]

They are still doing the whole (generation)(class)(productnumber) thing while it’s a totally Different chip for mobile than it is desktop

all they dumped is the I moniker.

Arrow Lake is scheduled for the desktop in 2024. It should be similar to Meteor Lake, probably with a larger computer tile to allow 8 P cores, but will keep Low Power E-cores? It will have a Neural Processing Unit for sure. Intel may refer to both Meteor Lake and Arrow Lake as Series 1 now that the gen naming has been dropped.

 

[hs4]

Arrow Lake is scheduled for the desktop in 2024. It should be similar to Meteor Lake, probably with a larger computer tile to allow 8 P cores, but will keep Low Power E-cores? It will have a Neural Processing Unit for sure. Intel may refer to both Meteor Lake and Arrow Lake as Series 1 now that the gen naming has been dropped.

Arrow lake compute tiles can grow smaller albeit with more cores. Although the scaling of Intel 20A has not been announced, it is thought that the density will increase because the fins that were arranged horizontally will be stacked vertically, and the metal layers will be devided into frontside-backside and they also be stacked vertically with PowerVIA.

OneRaichu said that the SoC tiles are common or very similar between MTL and ARL, so the LP-E core will remain Crestmont, even though ARL's compute tile will use Skymont. There is. (It seems that the LP-E core will also be Skymont in LNL)

 

[Squared]

Arrow lake compute tiles can grow smaller albeit with more cores. Although the scaling of Intel 20A has not been announced, it is thought that the density will increase because the fins that were arranged horizontally will be stacked vertically, and the metal layers will be devided into frontside-backside and they also be stacked vertically with PowerVIA.

OneRaichu said that the SoC tiles are common or very similar between MTL and ARL, so the LP-E core will remain Crestmont, even though ARL's compute tile will use Skymont. There is. (It seems that the LP-E core will also be Skymont in LNL)

If the LP-E is Crestmont, then Crestmont's ISA will be the ISA of Arrow Lake. So no new instructions, no AVX10 (unless Crestmont already has it). That has the potential to be a disappointment.

I also am a little skeptical though. Meteor Lake is built with Intel 4 for the compute tile and TSMC N6 for the SoC tile and its LP-E cores. Despite N6 being an older node it should be perfectly fine next to Intel 4 because it's a density-optimized node and Intel 4 is frequency-optimized. But if the compute tile is upgraded to Intel 20A complete with newer cores, then Crestmont on N6 is also going to start to look bad for battery life.

 

[hs4]

If the LP-E is Crestmont, then Crestmont's ISA will be the ISA of Arrow Lake. So no new instructions, no AVX10 (unless Crestmont already has it). That has the potential to be a disappointment.

I also am a little skeptical though. Meteor Lake is built with Intel 4 for the compute tile and TSMC N6 for the SoC tile and its LP-E cores. Despite N6 being an older node it should be perfectly fine next to Intel 4 because it's a density-optimized node and Intel 4 is frequency-optimized. But if the compute tile is upgraded to Intel 20A complete with newer cores, then Crestmont on N6 is also going to start to look bad for battery life.

According to the Intel's ISA Reference Guide,
1. Arrow lake has two different CPUID: 06_C5H & 06_C6H.
2. 06_C6H is described as "Arrow lake-S".
3. Both supports ISA supported by Sierra Forest except Xeon-mandatory instructions.
4. Some instructions are only supported by "Arrow lake-S" 06_C6H and Lunar lake.

The most likely scenario is that ARL-H shares a SoC tile with MTL-H, resulting in smaller supported instructions, and ARL-S and LNL-M create new SoC tiles, which use Skymont as the LP-E core. I think it will be installed.

 

[Squared]

According to the Intel's ISA Reference Guide,
1. Arrow lake has two different CPUID: 06_C5H & 06_C6H.
2. 06_C6H is described as "Arrow lake-S".
3. Both supports ISA supported by Sierra Forest except Xeon-mandatory instructions.
4. Some instructions are only supported by "Arrow lake-S" 06_C6H and Lunar lake.

The most likely scenario is that ARL-H shares a SoC tile with MTL-H, resulting in smaller supported instructions, and ARL-S and LNL-M create new SoC tiles, which use Skymont as the LP-E core. I think it will be installed.

Thanks for explaining. So desktop chips will get a new SoC tile and mobile will reuse the one from Meteor Lake. It sounds like a little bit of a bummer on mobile, but probably not a big deal. The average mobile user probably wouldn't benefit from the new instructions, and while I did also mention a battery life concern, Meteor Lake is supposed to have great battery life so using its SoC should be alright.

 

[hs4]

Thanks for explaining. So desktop chips will get a new SoC tile and mobile will reuse the one from Meteor Lake. It sounds like a little bit of a bummer on mobile, but probably not a big deal. The average mobile user probably wouldn't benefit from the new instructions, and while I did also mention a battery life concern, Meteor Lake is supposed to have great battery life so using its SoC should be alright.

I just checked again, and the latest manual is out after Intel Innovation, and it seems that Clearwater Forest supports instructions (such as AVX-VNNI-INT16) that only ARL-S and LNL-M supported.

Since AVX10.1 only supports Granite Rapids, it seems that AVX10.2 seems to be the next generation of Skymont.