Even though the FPU is separate in SPARC, it behaves like an internal coprocessor.
Hint: It acts like an internal co-processor when it's dedicated per core as well. There is a very fine line where the FPU starts and ends and isn't fully coupled into the integer core like you claim. Yes, it does allow the result generated by the FPU to flow back to the integer core but, that's usually so the AGU can figure out where to put it in memory after the calculation is complete.
A FPU can not function as a processor of any kind by itself. Integer math is a requirement for any modern day machine used personally or in servers. Even GPUs which are designed to do massively parallel floating point computations must have the ability to do integer math because floating point means nothing without it. Is it really so hard to comprehend that a CPU can exist without a FPU but a CPU can't exist without integer logic?
Also, IBM's POWER7 has
four DP FPUs per core and can do SMT with up to 4 threads per core. The dedicated FPUs didn't make it a core but, the singular pairs of ALUs and AGUs did. How is that not any different from the reverse case? If I recall correctly, multi-core POWER CPUs have shared instruction decode logic that gets put on to queues for each core. So not only does it have dedicated FPUs contained within a single "core", it has shared logic for all of the cores to dispatch instructions. By your logic, the POWER7 is a one core CPU because it shared resources between all of the cores but, could be 4 times as many cores because of the number of FPUs.
Either way, even if BD had a more FPUs or a beefier FPU, I think people would have still called foul on the terrible integer performance which begins with single-threaded applications running alone. AMD hoped that more cores was going to offset the degradation of IPC but, they were wrong. Haswell's integer core has twice as many ALUs as BD and one more AGU. That alone should tell you something.
Simple fact is that AMD told the public that Bulldozer was going to have a 256-bit FMA FPU per module. There was no deception. The problem is that most people don't know what the hell that means. People also don't probably know that their Intel CPU probably has dual dispatch 256-bit FPUs per integer core. Different CPUs with different goals. That's it.