- Joined
- Jun 24, 2015
- Messages
- 8,151 (2.37/day)
- Location
- Western Canada
System Name | ab┃ob |
---|---|
Processor | 7800X3D┃5800X3D |
Motherboard | B650E PG-ITX┃X570 Impact |
Cooling | NH-U12A + T30┃AXP120-x67 |
Memory | 64GB 6400CL32┃32GB 3600CL14 |
Video Card(s) | RTX 4070 Ti Eagle┃RTX A2000 |
Storage | 8TB of SSDs┃1TB SN550 |
Case | Caselabs S3┃Lazer3D HT5 |
Damn, I was expecting a complicated explanation, but not absolutely all the issues surfacing at once.
Steve's comment about AM5 being a mess really sums up everything pretty well. Everybody is lazy, everybody is incompetent. AGESA is forever a cursed bastard child and AMD will never honestly and transparently communicate with either its users or board vendors, board vendors won't ever listen to user feedback or do better than half-functional BIOSes that don't implement AGESA properly and don't know what OCP and OTP are.........lol @ Asus releasing a first wave of "fixed" BIOSes that didn't fix anything, still kinda funny that Asus chose to adopt Gigabyte's overvolting reputation
That worse silicon quality chips are more likely/sooner to experience damage is in line with any core or IO degradation claims from any past Ryzen generation. The golden samples are never able to replicate early production degradation concerns, and reports would gradually fade as yields improved further into the production run as everyone collectively forgot about it.
Most interesting part of this is the block diagram that shows VDDCR_GFX deriving from Vcore. Skatterbencher was wrong about the topology then (but understandably so). VDDCR_GFX have always taken from VSOC so this not only explains the link of both CCD and IOD exploding, but is a first for AMD. But having iGPU on IO die is also a first, so maybe future APUs will still stick with SOC (which is not preferable).
Looking forward to the video detailing all the platform bugs, anything to give AMD and the board partners a fresh motivational kick in the rear
Last edited: