AMD Ryzen 7000 "Zen 4" Launch Date and Lineup Revealed, Spectacular AM4 Rumor Surfaces

[R0H1T]

So they'll remove/downgrade DDR5, PCIe 5.0 & the LGA socket to sell a CPU which will probably only match 5800x3d in gaming & sell them cheap(er) than regular AM5 chips

While we're at it why not sell 96c/128t TR for 2k, after all dreams cost nothing

 

[Pictus]

Lisa Su made it clear that AM4 wasn't dead and that it had a long life ahead of it. Read from that what you may....

Now we know why, good catch!

BTW, for audio(FabFilter stuff) the 5800X3D kicks ass of the 12900KS/5950X specially in Ableton/Bitwig/Reaper/Studio One, but not in Cubase/Pro Tools.

Konzert der Prozessoren

Schnelle und leise Rechner wünscht sich jeder, besonders in der Musikproduktion: Ein überlasteter Prozessor darf dort weder in einem Gitarrensolo knacksen noch sein Lüfter wie ein Staubsauger rauschen. Der Apple Mac Studio ist schnell, leise und dazu noch kompakt. Doch unser Leistungsvergleich...

www.heise.de

 

[Mussels]

So they'll remove/downgrade DDR5, PCIe 5.0 & the LGA socket to sell a CPU which will probably only match 5800x3d in gaming & sell them cheap(er) than regular AM5 chips

While we're at it why not sell 96c/128t TR for 2k, after all dreams cost nothing

If PCI-E 5 and DDR5 are added in via the IO die, why not?

"only match the 5800x3d" .... so only match the best gaming CPU in the world?

 

[R0H1T]

PCIe 5.0 lanes isn't/cannot be added via IoD, they're baked into the CPU, yes the memory controller for sure but you're still basically "downgrading" the chip! Remember with DDR4 the IPC & overall performance will be lower, even if by a small amount then the hassle of packaging the chips to fit a PGA socket? This could happen in the future with say Zen4c or whatever AMD decides to release as a last hurray on AM4 but for the regular zen4 chips it's pretty doubtful IMO, in part because demand for 5nm is sky high right now. Just because AMD decides to sell them cheap doesn't really mean TSMC will charge them less for it.

 

[Mussels]

PCIe 5.0 lanes isn't/cannot be added via IoD, they're baked into the CPU, yes the memory controller for sure but you're still basically "downgrading" the chip! Remember with DDR4 the IPC & overall performance will be lower, even if by a small amount then the hassle of packaging the chips to fit a PGA socket? This could happen in the future with say Zen4c or whatever AMD decides to release as a last hurray on AM4 but for the regular zen4 chips it's pretty doubtful IMO, in part because demand for 5nm is sky high right now. Just because AMD decides to sell them cheap doesn't really mean TSMC will charge them less for it.

When i said the IoD could be swapped, i meant that it worked both ways

Get a 5800x3D, swap the CCX with a new zen 4 one. Same old IO die on AM4, same old memory controller - but (most) of the performance improvements and design changes would come along.

 

[marios15]

So they'll remove/downgrade DDR5, PCIe 5.0 & the LGA socket to sell a CPU which will probably only match 5800x3d in gaming & sell them cheap(er) than regular AM5 chips

While we're at it why not sell 96c/128t TR for 2k, after all dreams cost nothing

Must be great to be able to use your PCIe 5.0, and being able to see all the Zen 4 benchmarks this early!




Wait a minute...!

 

[Mussels]

Must be great to be able to use your PCIe 5.0, and being able to see all the Zen 4 benchmarks this early!




Wait a minute...!

I mean we absolutely can do that!

because the results are the same as they are night now on 4.0

 

[Butrus]

The wording on this is kinda weird, cause even if the rumor becomes true, AM5 will still be DDR5 exclusive.

I have my doubts that AM5 will be DDR5 exclusive. Yes, AM5 won't be DDR4, but what about DDR6, DDR7?

 

[ShurikN]

but what about DDR6, DDR7?

AM6 and AM7 respectively

 

[Wirko]

I have my doubts that AM5 will be DDR5 exclusive. Yes, AM5 won't be DDR4, but what about DDR6, DDR7?

Nah. Very improbable. At best, the AM5 was designed with much faster DDR5 in mind, like DDR5-10000, and PCI Express 6.0. Each of them will cause enough trouble to anyone trying to design and manufacture anything related.
The PCIe 6.0 final specification is six months old already, it may come to consumer PCs in ~2 years.

 

[Mussels]

I have my doubts that AM5 will be DDR5 exclusive. Yes, AM5 won't be DDR4, but what about DDR6, DDR7?

Buh?
Starting with AM2, the number has always indicated the DDR memory type supported on the socket

Even when you could run DDR2 or DDR3 on certain AM3 CPU's, the socket name was still tied to the motherboard and its AM2/AM3 socket with DDR2 or DDR3 support

 

[HenrySomeone]

If PCI-E 5 and DDR5 are added in via the IO die, why not?

"only match the 5800x3d" .... so only match the best gaming CPU in the world?

It's NOT the best gaming cpu in the world, lol. It might not be far behind, but it is behind nevertheless:

And considering how far off the top it is almost everywhere else and its exorbitant (matching or even exceeding 5950x in many places), it's really not the best in anything...

 

[Mussels]

It's NOT the best gaming cpu in the world, lol. It might not be far behind, but it is behind nevertheless:

And considering how far off the top it is almost everywhere else and its exorbitant (matching or even exceeding 5950x in many places), it's really not the best in anything...

Ah yes, a 2% difference at 720p

or the 0.2% difference at 1080p
relative-performance-games-1920-1080.png (500×1170) (tpucdn.com)

And it only takes DDR5 6000 to achieve that performance gain!
When the chips are within a 1% margin of error depending on the resolution you game at and which games/titles you're using, and the intel literally doubles the power usage of the system...

 

[bug]

Ah yes, a 2% difference at 720p

or the 0.2% difference at 1080p
relative-performance-games-1920-1080.png (500×1170) (tpucdn.com)

And it only takes DDR5 6000 to achieve that performance gain!
When the chips are within a 1% margin of error depending on the resolution you game at and which games/titles you're using, and the intel literally doubles the power usage of the system...

We all know actual gaming is rarely CPU-bottlenecked. Claiming "the fastest gaming CPU" doesn't really mean anything.

 

[Count von Schwalbe]

I would be curious as to how many chipsets back these could go to. 300 series? That would mean that if I built a Zen system I could upgrade it 4 generations...

I also would be curious as to how easily you could shoehorn a Zen 4 chiplet into a 5800X package. Is the Infinity Fabric identical? What sort of motherboard interfaces actually pass right through the I/O die into the CCX? Do we use better bins because of the lower power limit or worse ones with lower to not cannibalize sales of AM5? More cores or less? Zen 4 with V-Cache? So many questions...

 

[Wirko]

What sort of motherboard interfaces actually pass right through the I/O die into the CCX?

Well, none - everything goes through Infinity Fabric. The I/O die routes the data from the motherboard to any number of CCDs, there can be one or there can be eight (if it's an Epyc).

 

[Mussels]

I would be curious as to how many chipsets back these could go to. 300 series? That would mean that if I built a Zen system I could upgrade it 4 generations...

I also would be curious as to how easily you could shoehorn a Zen 4 chiplet into a 5800X package. Is the Infinity Fabric identical? What sort of motherboard interfaces actually pass right through the I/O die into the CCX? Do we use better bins because of the lower power limit or worse ones with lower to not cannibalize sales of AM5? More cores or less? Zen 4 with V-Cache? So many questions...

That's what I asked - AMD proved they can mix and match IO dies with different gen CCX (Zen 2/Zen3 are the same IO die)
Intel definitely got one thing incredibly right (both brands tried this to limited extent, but intel took it furthest) - we DO NOT NEED every CPU Core to reach the same clock speed and performance. Single threaded apps are just that, and we only need 2-6 of these high performance cores, multi threaded loads can be happily spread over a greater amount of lower speed efficient cores instead.

If the memory controller and IO die don't change majorly, it absolutely could work on 300 series chipsets since memory support, USB ports, PCI-E lanes etc wouldn't change (I think that's AMD's goal with the newer unified AGESA. They seem to have long-term support on AM4 as a marketing weapon to use for AM5)

The big questions is: Will we see Zen 4 + Zen 3 in the one CPU package for a P/E core type scenario?
What about 3D cache cores mixed with regular cores?

Imagine a 5950x3D, where one die was the 5800x3D and the other two were regular zen 3 - if the OS could handle assigning the cores correctly (thanks to intel, that should happen in win 11 at least) they'd have a golden goose where they can mix and match high clocking dies as P cores and low clocking ones as E cores
They already have their preferred cores system so this would just expand on it, would it not?


Theres zero indication this IS whats happening and it's just my imaginary wishlist but after seeing intel successfully do it, i'm sure the AMD guys are trying to see if they can as well


My bonus explanations:
We can get halfway to this already on Zen3
Per CCX overclocking lets you set CCXs to different clock speeds, and windows 10/11 already seem to deal with that problem free
Some ASUS boards let you have base clock controlled by per-CCX while still doing PBO for low threaded clocks
AMD already showed they can re-use an IO die between generations
The only missing piece is can they do an intel legally without trademarks and patents getting in the way, and mix different generations together - and when they've got Zen 3, Zen 4, and 3D V-cache designs (as well as APU designs) to draw from it could get damned interesting


Hell what will next gen consoles be like with 4 3D cache cores + 8 E cores?

 

[Wirko]

The big questions is: Will we see Zen 4 + Zen 3 in the one CPU package for a P/E core type scenario?

Big+little, or P+E, or 4+4C or whatever you call it, makes sense if the cores are very much different in architecture, size, performance per area, and other characteristics. Zen 4 is an evolution of Zen 3; they are too similar. Besides, how would the CPU be named? 7899-and-half?
AMD may be pushed towards that weird option only of there was a serious shortage of Zen 4 dies and an excess of Zen 3 dies and even then ... no, that's equally impossible as my theory that a Zen 4 CPU (with two CCDs) and an X670E chipset (made up of two chipsets) can be split in two independent PCs.

What about 3D cache cores mixed with regular cores?

Huh, it's on my imaginary wishlist as much as on yours. I have said that in a joke before. A little less impossible (also, Lisa Su once held such a thing in her hand). It's equally plausible as my theory that AMD will reuse the Zen 3 V-cache die for Zen 4 (it's made on a variant of N7 that's tailored for static RAM, and static RAM almost doesn't shrink when going to a finer node).

i'm sure the AMD guys are trying to see if they can as well

I have trust in them too (but if they are any wise, they sometimes come to TPU forums and steal an idea here and there).

AMD already showed they can re-use an IO die between generations

Zen 2 to Zen 3, yes. Use the same for Zen 4 on AM4 again, if it ever materialises? I'm sure that their Infinity Fabric has evolved a lot for the Zen 4. Making the Zen 4 CCD compatible with the old I/O die, while optimising it for the new die, would be much of a hassle. Could be as complex as designing a combined DDR5+DDR4 memory controller. So a new variant of I/O die is more likely, I think.

 

[chrcoluk]

If they bringing some Zen4 without the useless PCIE5 and DDR5 fluff I am all for it.

 

[Count von Schwalbe]

Yes, the Infinity fabric compatibility would be my main question.

Huh, it's on my imaginary wishlist as much as on yours. I have said that in a joke before. A little less impossible (also, Lisa Su once held such a thing in her hand). It's equally plausible as my theory that AMD will reuse the Zen 3 V-cache die for Zen 4 (it's made on a variant of N7 that's tailored for static RAM, and static RAM almost doesn't shrink when going to a finer node).

Isn't L3 cache accessible by all cores? V-cache, even if applied to a particular die only, just adds cache. Hmmm, maybe locked E-cores (Zen 3?) with V-cache, and an overclockable P-core die?

The big questions is: Will we see Zen 4 + Zen 3 in the one CPU package for a P/E core type scenario?
What about 3D cache cores mixed with regular cores?

But is Zen 3 actually more efficient? I have heard rumors of a Zen 4C, which is a less excessive P/E core architecture, where the E cores are the same architecture but optimized for efficiency. Currently designed for use in servers but it may come out for desktop...

 

[Wirko]

Isn't L3 cache accessible by all cores?

I'm not sure. Maybe it is - if you're willing to wait 80 nanoseconds, which is the same as going to DRAM. And maybe it's not - the IOD just goes to DRAM to get the data (but still needs to synchronise the contents of caches on both chiplets).
Anand's men measured that in detail and gave a lengthy explanation which goes way over my head. There's probably no one that can continue what they were doing.

AMD Zen 3 Ryzen Deep Dive Review: 5950X, 5900X, 5800X and 5600X Tested

www.anandtech.com

 

[Mussels]

Big+little, or P+E, or 4+4C or whatever you call it, makes sense if the cores are very much different in architecture, size, performance per area, and other characteristics. Zen 4 is an evolution of Zen 3; they are too similar. Besides, how would the CPU be named? 7899-and-half?
AMD may be pushed towards that weird option only of there was a serious shortage of Zen 4 dies and an excess of Zen 3 dies and even then ... no, that's equally impossible as my theory that a Zen 4 CPU (with two CCDs) and an X670E chipset (made up of two chipsets) can be split in two independent PCs.


Huh, it's on my imaginary wishlist as much as on yours. I have said that in a joke before. A little less impossible (also, Lisa Su once held such a thing in her hand). It's equally plausible as my theory that AMD will reuse the Zen 3 V-cache die for Zen 4 (it's made on a variant of N7 that's tailored for static RAM, and static RAM almost doesn't shrink when going to a finer node).


I have trust in them too (but if they are any wise, they sometimes come to TPU forums and steal an idea here and there).


Zen 2 to Zen 3, yes. Use the same for Zen 4 on AM4 again, if it ever materialises? I'm sure that their Infinity Fabric has evolved a lot for the Zen 4. Making the Zen 4 CCD compatible with the old I/O die, while optimising it for the new die, would be much of a hassle. Could be as complex as designing a combined DDR5+DDR4 memory controller. So a new variant of I/O die is more likely, I think.

You pretty much summed up what i was saying - they've gone halfway, let's see if they go all the way



How long before we get PCI-E addon cards that just have 64 E cores on them with DDR5 RAM slots?

 

[LuxZg]

... no, that's equally impossible as my theory that a Zen 4 CPU (with two CCDs) and an X670E chipset (made up of two chipsets) can be split in two independent PCs.

Actually that's not impossible, that's what virtualization does, also can be done on Unix systems more "natively", and both Windows and Linux/Unix have software that can be used to split your PC among concurrent users. Probably not EXACTLY what you thought, as PC is still one, and you can't just shut down one half for example, but with enough tweaking you COULD limit access to individual hardware components, input, output, even put half of PC in low power state when one user is offline, and so on. But if I were to do that, I'd still get a very cheap "terminal" for one user which would just do input/output and relay everything over network to the main one via RDP or something similar. Today such terminal can be a TV, phone, Android "stick PC", Raspberry pi, or simply a very old throwaway PC with lite Linux distro and FreeRDP. On other side you can just have Windows with 2 user profiles, or if you want more separation, dedicated VM.

 

[Mussels]

Too much hardware is shared for them to be splittable into seperate PC's