AMD Ryzen 9 9950X3D and 9900X3D to Feature 3D V-cache on Both CCD Chiplets

[igormp]

The only benefit I see about this for me is if the 9950x pricing drops even more.
That extra cache is basically useless for most of what I do, not worth the extra price and (likely) reduced clock speeds.

There are plenty tasks besides gaming that will take advantage of that victim cache. Also now that both dies are getting stacked cache, it should get rid of problem arising from assymetric cores.

AMD Ryzen 7 5800X3D On Linux: Not For Gaming, But Very Exciting For Other Workloads - Phoronix

www.phoronix.com

The benefits are mostly for HPC and CFD workloads. And for those workloads, why would one even be using a Ryzen CPU? The dual-channel setup is already going to kill your performance anyway since those workloads are really memory bound.
For all others, it's actually a regression in performance due to the lower clocks. Here's the updated graph for Zen 4:

AMD Ryzen 7 7800X3D Linux Performance Review - Phoronix

www.phoronix.com

https://openbenchmarking.org/result/2304049-PTS-APRIL20258&sgm=1&hgv=Ryzen+7+7800X3D&sor

It is quite the contrary to what you say. Scheduling will now be even more important to the point it becomes SUPER-DUPER-MEGA-EXTRA-important with cache on both CCDs. For this dual cache setup to work correctly, games/apps (via the scheduler) always need to request the cached data from the "correct" cache on the "correct" CCD or else you will suffer latencies from hell if/when data needs to be fetched from the cache across the CCDs because e.g. Core 3 requests data that was previously stored to the cache by Core 14 on the other CCD. Can't have a scenario like that. Ever.

So, both the scheduler and the CPU always need to "know" exactly "who" (which core) cached something (what) and where it was cached to avoid the dreaded inter-CCD and inter-cache latencies. This is definitely going to be a challenge and very complex on the level of correct scheduling and correct CCD assignment etc.

AMD does not exactly have the best track record when it comes to these scheduling and core assignment shenanigans so I would be quite surprised if they get this to work flawlessly out of the gate.
Personally, I have avoided multi CCD CPUs like the plague due to the Xbox GameBar and 'GameMode On' requirements (I have a PC and not a console, you muppets). It will be interesting to see if the GameBar requirement will be dropped now(?) since core parking will no longer be required.

We'll have to wait and see how well this is gonna work in practice. I would expect some growing pains, to say the least...

I mean, that's mostly a Windows scheduler issue. Even Intel had to develop their own HW scheduler to work around that (which is pretty useless on Linux, as an example).

I'm not sure if inter die requests were ever a factor. If they were, then EPYC X would suffer much more than a hypothetical 5950X3D with 192 MB of L3 cache.

Epyc X is not really used for games, and workloads that can be embarassingly parallel (like the ones Epyc X are used for) should not really do much cross-core communication at all to begin with.

It’s probably just me, but I see this as a loss if X3D parts are frequency limited again. It would’ve been more beneficial if they had implemented some sort of hardware scheduler as opposed to just dropping in another 3D cache chiplet.

I don't think AMD would put so much effort in order to just work around Window's limitations. They haven't even updated Ryzen's desktop IO Die in a log time.
Maybe on Zen 6, as said before, but who knows.

There's pleny of benefits to be had from the increased L3 cache on all CCDs on consumer side, let alone on the data center, where it's already common.

Cloudflare switches to EPYC 9684X Genoa-X CPUs with 3D V-Cache — 145% faster than previous-gen Milan servers | Tom's Hardware (tomshardware.com)

As I said above, it's mostly only for CFD and HPC stuff (apart from games). Most consumers will get no benefit from such extra cache.

 

[Chrispy_]

I'm unsure if this is a net win or not. For sure, it will add to the manufacturing cost which is almost certainly going to translate to higher MSRPs on these two CPUs.

Games are the single biggest beneficiary of the extra cache, but they need that cache to be unified. For productivity applications, the reduced clockspeed of the CCD with v-cache is actually a downside that hinders performance.

So, if games can't take advantage because the cache isn't unified between both CCDs, and the extra cache hurts application performance in everything else because of the reduction in clockspeeds, I do not think there is any point including v-cache on both CCDs. It's just added cost that seems like a lose-lose scenario.

If AMD have found a way to link the cache so that any core can access v-cache on either die, then AMD have truly made a winner and I suspect the 7800X3D's gaming performance crown is about to be blown away by the 9950X3D. We can hope, right?

 

[Makaveli]

I'm not sure if inter die requests were ever a factor. If they were, then EPYC X would suffer much more than a hypothetical 5950X3D with 192 MB of L3 cache.

EPYC X workload usually isn't gaming though.

 

[FoulOnWhite]

AMDs AM5 saviour has arisen just as with AM4(kind of) these will most like sell a ton.

 

[biffzinker]

It is quite the contrary to what you say. Scheduling will now be even more important to the point it becomes SUPER-DUPER-MEGA-EXTRA-important with cache on both CCDs. For this dual cache setup to work correctly, games/apps (via the scheduler) always need to request the cached data from the "correct" cache on the "correct" CCD or else you will suffer latencies from hell if/when data needs to be fetched from the cache across the CCDs because e.g. Core 3 requests data that was previously stored to the cache by Core 14 on the other CCD. Can't have a scenario like that. Ever.

So, both the scheduler and the CPU always need to "know" exactly "who" (which core) cached something (what) and where it was cached to avoid the dreaded inter-CCD and inter-cache latencies. This is definitely going to be a challenge and very complex on the level of correct scheduling and correct CCD assignment etc.

AMD does not exactly have the best track record when it comes to these scheduling and core assignment shenanigans so I would be quite surprised if they get this to work flawlessly out of the gate.
Personally, I have avoided multi CCD CPUs like the plague due to the Xbox GameBar and 'GameMode On' requirements (I have a PC and not a console, you muppets). It will be interesting to see if the GameBar requirement will be dropped now(?) since core parking will no longer be required.

We'll have to wait and see how well this is gonna work in practice. I would expect some growing pains, to say the least...

You do realize cache snooping has existed since there was Two Socket, and Four Socket Pentium Pro boards? It would of also been active for AMD's AthlonXP MP chips on a two Socket A board. A similar occurrence happened on Intel's side when they took a shortcut to a quad core chip by using two Penryn dual-core dies with the Core 2 Quad 6600, and Core 2 Quad 9000 series. The cache snooping had to go out over the shared FSB.

 

[rv8000]

It's the usual "X3D if you game, normal if you don't" narrative again. Personally, I don't mind. Those higher clocks don't give you that much more performance anyway - only more power consumed and heat.

Except now you’ll be losing more non gaming performance due to both chiplets being potentially limited on frequency, plus the additional cost. Price to performance will tank, glad we’re all gaming at 720p though with 4090s.

 

[ThomasK]

Most consumers will get no benefit from such extra cache.

Sure, you're the expert.

 

[Ruru]

What happened to the 8xxx series? Why the jump from 7 to 9??

There are APUs in the 8k series lineup. Though they skipped the 6k series from desktops entirelly.

 

[AusWolf]

Except now you’ll be losing more non gaming performance due to both chiplets being potentially limited on frequency, plus the additional cost. Price to performance will tank, glad we’re all gaming at 720p though with 4090s.

I upgraded to a 7800X3D from a 7700X, and I can tell you, the performance difference between the two is negligible. Circa 18k vs 19k points in Cinebench R23. That's what? 5 percent? Except that the 7800 can do it with 80 W, while the 7700 needs to max out its 142 W limit to achieve the higher number. With all this in mind, plus with a better gaming performance, I don't care about that 5% at all.

 

[xacid]

I upgraded to a 7800X3D from a 7700X, and I can tell you, the performance difference between the two is negligible. Circa 18k vs 19k points in Cinebench R23. That's what? 5 percent? Except that the 7800 can do it with 80 W, while the 7700 needs to max out its 142 W limit to achieve the higher number. With all this in mind, plus with a better gaming performance, I don't care about that 5% at all.

Really not going to see improvement with the 3D cache in cinebench. Thing that benefits the most is gaming.

 

[AnotherReader]

EPYC X workload usually isn't gaming though.

That's right, but EPYC X workloads are far more likely than gaming to utilize more than 8 cores. With 11 more CCDs, rather than 1 additional CCD, the likelihood of a miss hitting in another CCD's cache should be higher for many of these cases. In addition, AMD has had snoop filters for a long time. We don't know if the Ryzen IOD includes this, but given that the IO die is using a more advanced process without any increase in die size, there might be enough space for one.

 

[kapone32]

laptop APUs

What about the 8700G? Is that a laptop APU?

Now the narrative can be satisfied. I guess we will see what happens as AMD said it made no difference so time to see if the AMD engineers are wrong.

 

[thesmokingman]

Now the narrative can be satisfied. I guess we will see what happens as AMD said it made no difference so time to see if the AMD engineers are wrong.

I haven't stayed at a Holiday Inn recently so I'll just wait for the real info to come out. /s

 

[mkppo]

What is the point of this? Games shouldn't cross CCD's and will ideally be pinned to one. What is the other CCD with cache going to do?

Their previous approach worked just fine and with scheduler improvements would've improved further. This will literally not do anything other than make uninformed people happy that there's extra victim cache on both CCD's which will do nothing in reality.

Don't think this is going to happen. AMD can't care any less about the people wanting extra cache on both CCD's thinking it'll magically improve performance. It won't.

 

[Neo_Morpheus]

Finally, now the people will see that the 3D cache on both dies is useless and will stop crying for this

Maybe something changed, but I do recall AMD stating that it didnt make any difference having both CCDs with 3D cache.
But since everyone keep trashing Zen 5...

I upgraded to a 7800X3D from a 7700X, and I can tell you, the performance difference between the two is negligible. Circa 18k vs 19k points in Cinebench R23. That's what? 5 percent? Except that the 7800 can do it with 80 W, while the 7700 needs to max out its 142 W limit to achieve the higher number. With all this in mind, plus with a better gaming performance, I don't care about that 5% at all.

Something that has been the norm since the first X3D chip came out, but since the norm everywhere is to trash AMD regardless, you end up with the current narrative used everywhere that Zen 5 is absolute trash because its not a good gaming CPU but continuing bellow..

Thing that benefits the most is gaming.

Please do repeat that to all the haters that are trashing the current Zen 5 CPU's due to not being good in ...gaming...

I am curious to see if this time, adding 3D cache on both CCD's works. And saving on popcorn, for when the price is announced...

 

[rv8000]

I upgraded to a 7800X3D from a 7700X, and I can tell you, the performance difference between the two is negligible. Circa 18k vs 19k points in Cinebench R23. That's what? 5 percent? Except that the 7800 can do it with 80 W, while the 7700 needs to max out its 142 W limit to achieve the higher number. With all this in mind, plus with a better gaming performance, I don't care about that 5% at all.

Slightly different story with a dual CCD sku, of which we don’t know what the frequencies will be and whether or not crossing the ccx is still going to cause performance drops as long as scheduling is left up to software/windows. Primarily why a hardware scheduler would’ve been a better solution, as gaming software is largely limited by console hw specs and not utilizing more than 8 cores anyways. A proper implementation of your “best of both worlds” dig would absolutely be a better solution when it comes to price performance, and even providing better efficiency with a hybridized design, but I’ll leave you to your concession.

 

[igormp]

Sure, you're the expert.

I mean, feel free to point out any use that's relevant to consumers other than the already mentioned ones (gaming, hpc and cfd). You linked a DC scenario, which doesn't reflect consumer usage at all.

That's right, but EPYC X workloads are far more likely than gaming to utilize more than 8 cores. With 11 more CCDs, rather than 1 additional CCD, the likelihood of a miss hitting in another CCD's cache should be higher for many of these cases. In addition, AMD has had snoop filters for a long time. We don't know if the Ryzen IOD includes this, but given that the IO die is using a more advanced process without any increase in die size, there might be enough space for one.

EPYC X workloads should also be embarrasingly parallel and not need to do such cross-core requests. Reminder that, even with improvments, the cross-CCD latency has the same cost as actually accessing RAM.
I'm pretty sure the L3 cache on Zen is coherent, but it's a victim cache whose cross-CCD costs doesn't make much sense to care about this that much, as far as I know.

 

[ThomasK]

(gaming, hpc and cfd).

You replied to my comment on someone else's post, which I'll repost below.

Finally, now the people will see that the 3D cache on both dies is useless and will stop crying for this

Now you answered it yourself.

Thanks.

 

[AnotherReader]

I mean, feel free to point out any use that's relevant to consumers other than the already mentioned ones (gaming, hpc and cfd). You linked a DC scenario, which doesn't reflect consumer usage at all.


EPYC X workloads should also be embarrasingly parallel and not need to do such cross-core requests. Reminder that, even with improvments, the cross-CCD latency has the same cost as actually accessing RAM.
I'm pretty sure the L3 cache on Zen is coherent, but it's a victim cache whose cross-CCD costs doesn't make much sense to care about this that much, as far as I know.

I agree that the latency of getting a line from a remote L3 cache is in the same ballpark as a hit in better than JEDEC DRAM. EPYC X workloads are much more parallel than gaming, but I doubt that inter core latency is hampering games right now, especially considering Intel's cores handle gaming well and in their case, only the 8 P cores have decent inter core latency. The vast majority of games don't need more than 8 cores so the issue of inter core latency is expected to be inconsequential.

 

[igormp]

You replied to my comment on someone else's post, which I'll repost below.


Now you answered it yourself.

Thanks.

But I do agree with the poster you originally replied to lol
I don't see a point of a 2x CCD v-cache CPU for games, the 9800x3D is likelly still going to be faster, so no real benefit. I may be wrong on that, of course, so we need to wait for the product to become a thing and benchmarks to come out.

CFD and HPC I don't even think are really significative because, as I said above, those are better suited to platforms with way more channels.

The vast majority of games don't need more than 8 cores so the issue of inter core latency is expected to be inconsequential.

I agree with that, but then it means that having the 2 CCDs with the extra cache is kinda pointless to begin with.

 

[Dr. Dro]

It is quite the contrary to what you say. Scheduling will now be even more important to the point it becomes SUPER-DUPER-MEGA-EXTRA-important with cache on both CCDs. For this dual cache setup to work correctly, games/apps (via the scheduler) always need to request the cached data from the "correct" cache on the "correct" CCD or else you will suffer latencies from hell if/when data needs to be fetched from the cache across the CCDs because e.g. Core 3 requests data that was previously stored to the cache by Core 14 on the other CCD. Can't have a scenario like that. Ever.

So, both the scheduler and the CPU always need to "know" exactly "who" (which core) cached something (what) and where it was cached to avoid the dreaded inter-CCD and inter-cache latencies. This is definitely going to be a challenge and very complex on the level of correct scheduling and correct CCD assignment etc.

AMD does not exactly have the best track record when it comes to these scheduling and core assignment shenanigans so I would be quite surprised if they get this to work flawlessly out of the gate.
Personally, I have avoided multi CCD CPUs like the plague due to the Xbox GameBar and 'GameMode On' requirements (I have a PC and not a console, you muppets). It will be interesting to see if the GameBar requirement will be dropped now(?) since core parking will no longer be required.

We'll have to wait and see how well this is gonna work in practice. I would expect some growing pains, to say the least...

Nothing that doesn't already occur with every regular Ryzen 9 since the 3950X! This approach is MUCH, MUCH preferred over the hybrid garbage. It's really tempting me! Although my money would be better spent on a RTX 5090...

 

[DeathtoGnomes]

I suspect the 7800X3D's gaming performance crown is about to be blown away by the 9950X3D. We can hope, right?

YOU TAKE THAT BACK! I want my 7800X3D to wear the crown one more generation.

 

[wNotyarD]

YOU TAKE THAT BACK! I want my 7800X3D to wear the crown one more generation.

Huh... Won't at least the 9800X3D take the crown anyway?

 

[TomWeng]

Finally 9950x3d is the most powerful gaming processor in the world.

 

[freeagent]

I bet they will tune it so it kicks axe.

X3D on dual CCD probably wasnt the best of ideas on previous models, though none of us really know that for certain.. I am willing to bet they will make it make a difference.

Gaming on Ryzen 9 is not nearly as bad as some make it out to be lol..