AMD "Vermeer" Zen 3 Processors Branded Under Ryzen 5000 Series?

[btarunr]

AMD is allegedly preparing to market its next-generation Socket AM4 desktop processors based on the "Vermeer" MCM, under the Ryzen 5000 Series. The "Vermeer" MCM implements the company's "Zen 3" microarchitecture in the client segment. It features up to two 7 nm-class CPU complex dies with up to 8 cores, each, and a refreshed cIOD (client IO die). AMD has allegedly improved the cIOD with a new memory controller and several new toggles that improve memory bandwidth. The cIOD combines a PCI-Express Gen 4 root complex with a dual-channel DDR4 memory controller. With "Zen 3," AMD is also introducing an improved boosting algorithm, and an improved SMT feature.

Coming back to AMD's rumored nomenclature, and we could see the company bumping up its processor model numbers to the 5000 series for equivalent core-counts. For example, the Ryzen 9 5900X is a 12-core/24-thread part, much like the 3900X; whereas the Ryzen 7 5800X is an 8-core/16-thread part. This flies in the face of rumors that AMD could take advantage of the 8-core CCX design of the "Zen 3" microarchitecture by carving out 10-core parts using two CCDs with 5 cores enabled, each. The reason AMD is skipping the 4000 series numbering with "Vermeer" probably has something to do with "Renoir" taking up many of the 4000-series model numbers. "Renoir" is based on "Zen 2," and recently made its desktop debut, albeit as an OEM-exclusive. The company is planning to introduce certain 4000G series models to the DIY retail segment. AMD is expected to announce its first "Zen 3" client-segment processors on October 8, 2020.



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[theGryphon]

Finally, they saw the light!

 

[dont whant to set it"']

Not getting my hopes to high on a beta bios for my X370MB but I am secretly hoping like a young child awaiting them Zen3 cpu's like for the present opening day of Christmas.

 

[Sykobee]

I wonder if this will continue? Zen 3 Cezanne APU will be 6000 series, and Zen 4 CPU 7000 series?

I suspect Van Gogh which should be out soon will also be under 4000 series. There's a Renoir Refresh / Lucienne rumoured as well, likely in the 4000 space.

Cezanne won't be the only Zen 3 APU either, Rembrandt is Zen 3 + RDNA2 most likely, so it could be that 6000 series would fill out a lot as well, so pushing CPUs in that namespace will be confusing.

 

[dj-electric]

Same source tells us 5800X will be an 8 core part despite some people suspecting it will finally see a deserved upgrade to 10 cores.

Interesting, maybe its just not financially right to do this kind of whacky component disablement job

 

[8BitZ80]

This is the most I've ever anticipated a new CPU release. Major redesigns give the biggest gains in single core performance, and that's what keeps a gaming pc going. I'm thinking of upgrading and staying on Zen 3 for the next 10 years.

 

[Dredi]

Same source tells us 5800X will be an 8 core part despite some people suspecting it will finally see a deserved upgrade to 10 cores.

Interesting, maybe its just not financially right to do this kind of whacky component disablement job

There is no point in making a 10 core part. There will be no chips coming from the manufacturing line with 5 non functioning cores. The only sane choices this time are 7, 8, 14 and 16 core parts. If they go with 6 and 12 core parts it means that they contain working, but disabled cores and that AMD is yielding 14% of multi threaded performance gains just to do artificial product segmentation.

Based on the publicly available information given by TSMC and the assumption that zen3 chiplets are about the same size as zen2 chiplets 97% of ’6 core chiplets’ contain 7 working cores with one disabled. In previous processors it made sense to do 6 and 12 core parts, as each CCX had to have identical number of cores and an extra core had to be disabled anyway. Also the error rate of the process was a lot higher than the current ~0.09 per cm^2.

 

[AnarchoPrimitiv]

There's no way AMD is cutting out the 16 core part, it was such a popular CPU (in both sales and mindshare... It signified AMD's complete dismemberment of Intel's Desktop and HEDT platforms). The only thing I see happening is AMD may delay the release of the 16 core part for a month or so like they did with the 3950X. I don't see them pushing 16 cores back to threadripper (perhaps they may have a 16 core options on threadripper, but still have the 16 core option on the main platform), and the fact that Zen3 has a big IPC increase, frequency bumps, double the cores per CCX, would all mean the new 16 core part would put Intel's HEDT segment back up against the wall.... Perhaps they could push 16 cores back to threadripper exclusively, but I don't think that'd go over too well

 

[Mysteoa]

I wonder if this will continue? Zen 3 Cezanne APU will be 6000 series, and Zen 4 CPU 7000 series?

I suspect Van Gogh which should be out soon will also be under 4000 series. There's a Renoir Refresh / Lucienne rumoured as well, likely in the 4000 space.

Cezanne won't be the only Zen 3 APU either, Rembrandt is Zen 3 + RDNA2 most likely, so it could be that 6000 series would fill out a lot as well, so pushing CPUs in that namespace will be confusing.

No. They want to bring the naming in line with the mobile processors. So new mobile processors, that will have zen3, would be called 5000 series. This is to not confused the users with what architecture is in what generation.

 

[BluesFanUK]

Hurry up AMD, I need a new system!

 

[MDWiley]

Weren’t there rumors of this gen going with a single die to help latency or something? I’m no expert so please correct me if I’m wrong.

 

[Chrispy_]

So Cezanne and Zen3 will all be 5000?

I suspect they'll f*** it up again; They can't help scalp some extra hype and sales by re-releasing an existing generation with a +1000 name to make it look like new tech when Cezanne or its successor comes out.

 

[SL2]

I wonder if this will continue? Zen 3 Cezanne APU will be 6000 series, and Zen 4 CPU 7000 series?

Really?

Next major APU update should be 5000, which makes sense. There's no point in running out of numbers as fast as possible.
Intel had a decent system that worked for a decade, but as soon as they started using >10000 it didn't look as good anymore.

 

[Dredi]

Intel had a decent system that worked for a decade, but as soon as they started using >10000 it didn't look as good anymore.

If only they had stuck with the same generation number for same process&micro architecture pair. They would still have plenty of numbers left.

 

[Bubster]

call it whatever you Want Dr Su...just make it good and affordable.

 

[Nater]

So do you think we'll be seeing an X670 chipset release with these? I've noticed no chatter on that front. AM4 is pretty much done after this product launch no?

 

[Chrispy_]

Weren’t there rumors of this gen going with a single die to help latency or something? I’m no expert so please correct me if I’m wrong.

I think you're possibly confusing the single CCX in each Zen3 chiplet. They are still using MCM designs with just cores on one or two 'chiplet' dies, and the uncore on a seperate die.

A Zen 2 chiplet is made of two CCX, each of which has 4 cores that can access 16MB of L3 cache. For a core in CCX2 to use data from the cache in CCX1, the data has to be copied via the infinity fabric to the cache in CCX2, adding latency and duplicating data that wastes available cache.

Zen3 chiplets will be one big CCX with 8-cores and 32MB of L3 cache. Any core in that chiplet has access to any cache, there will be no additional latency between those cores and the cache will not be wasted with duplicate data because the cache isn't split into two smaller 16MB partitions for each CCX.

This is probably the simplest explanation:

Z2 = Zen 2 single core
Z3 = Zen 3 single core
L2 = Per-core L2 cache
L3 = Shared cache per CCX

 

[Space Lynx]

I've adjusted my signature to accommodate for any naming scenario, we good now homies.

 

[theGryphon]

No way there will be odd number of cores. Makes no sense for anyone including AMD.

I expect single-CCX models as:
4 cores without SMT with 16MB cache,
4 cores with SMT with 16MB cache,
6 cores without SMT with 32MB cache,
6 cores with SMT with 32MB cache,
8 cores with SMT with 32MB cache.

Potential double-CCX models:
10 cores with SMT with 48MB cache,
12 cores with SMT with 64MB cache,
16 cores without SMT with 48MB cache (highest clocked part),
16 cores with SMT with 64MB cache.

 

[sergionography]

I wonder if this will continue? Zen 3 Cezanne APU will be 6000 series, and Zen 4 CPU 7000 series?

I suspect Van Gogh which should be out soon will also be under 4000 series. There's a Renoir Refresh / Lucienne rumoured as well, likely in the 4000 space.

Cezanne won't be the only Zen 3 APU either, Rembrandt is Zen 3 + RDNA2 most likely, so it could be that 6000 series would fill out a lot as well, so pushing CPUs in that namespace will be confusing.

I kept reading Rembrandt as Rebrand lol. I urge AMD to reconsider it's naming, unless it is actually a rebrand of cezanne lol
I can already imagine my youtube auto caption during AMDs presentation going like "we present to you our brand new high end rebranded processor"

Same source tells us 5800X will be an 8 core part despite some people suspecting it will finally see a deserved upgrade to 10 cores.

Interesting, maybe its just not financially right to do this kind of whacky component disablement job

Makes no sense unless they increased each chiplet to 10 cores each. As is they probably have good enough yields to be able to get 4 cores out of every functional chiplet, so why cut it down further when there is no financial gain. The only reason they would is to flex muscle with a 10core vs 10core AMD to Intel comparison, but I have a feeling an 8 core should do the job anyways

Edit: actually now that I think about it, there is a possibility amd could enable 5 cores per chiplet, as they don't have that limitation anymore since it's in the same ccx

 

[AusWolf]

There's no way AMD is cutting out the 16 core part, it was such a popular CPU (in both sales and mindshare... It signified AMD's complete dismemberment of Intel's Desktop and HEDT platforms). The only thing I see happening is AMD may delay the release of the 16 core part for a month or so like they did with the 3950X. I don't see them pushing 16 cores back to threadripper (perhaps they may have a 16 core options on threadripper, but still have the 16 core option on the main platform), and the fact that Zen3 has a big IPC increase, frequency bumps, double the cores per CCX, would all mean the new 16 core part would put Intel's HEDT segment back up against the wall.... Perhaps they could push 16 cores back to threadripper exclusively, but I don't think that'd go over too well

The article says Zen 3 will consist of 1 or 2 CPU dies with 8 cores each (same as Zen 2). Based on this, I strongly doubt that the 16-core part would be pushed back to HEDT. I would be very sad too, as that's the one I'm waiting for.

 

[InVasMani]

So do you think we'll be seeing an X670 chipset release with these? I've noticed no chatter on that front. AM4 is pretty much done after this product launch no?

Really hard to say, but moving to DDR5 will probably entail a new socket and I imagine a new I/O die as well. Moving to 5nm on the other hand shouldn't require DDR5 so in that sense AMD has two possibilities. The chips and the chipset I feel could support DDR4 and DDR5 with different I/O die's and with different sockets. There is a minor possibility that AMD could ease the transition from DDR4 to DDR5 by allow two platforms to cater to both for Zen4 at 5nm.

In a lot of ways that a more ideal option than hybrid motherboards that support both memory types, but a good stop gap remedy for those that can't just outright afford to by new memory that tends to be expensive and not all that mature early in it's life cycle. It even opens a bit of a avenue for a upgrade later to a new socket with more mature DDR5 down the road with the same CPU and possibly a new chipset as well since DDR5's life cycle should span quite a awhile major memory architecture changes tends to progress at a slower more drawn out pace.

I think it would be more ideal to have more transitional and phased upgrades like that anyway where you don't necessarily just have that more massive upfront cost of buying everything much more periodically. Buying into increased improvements a bit a time is a easier pill to swallow to the end user. So certainly something that needs to be weighed. I think I'd be more inclined to buy into Threadripper's DDR4 EOL chip down the road rather than moving to DDR5 to be honest. At least based on my current situation. I just don't plan to replace my DDR4 memory in a real hurry quite so soon. I'm not sure what will happen with Zen4, but I guess with ThreadRipper I'm somewhat covered in either case. That said I would enjoy seeing a 5nm DDR4 Ryzen CPU personally or scaled back core count ThreadRipper DDR4 octa-channel chip with higher frequency boost would be interesting.

 

[dragontamer5788]

No way there will be odd number of cores. Makes no sense for anyone including AMD.

The PS3 was manufactured with 8 SPEs (kinda like shader-cores on a GPU), but 1 was assumed to be defective in manufacturing and was fused-off. As a result, the PS3's official specs that programmers coded against was 7-SPEs, an odd number.

AMD also was famous for selling triple-core processors back in the Phenom II days. Odd core-counts are perfectly logical and can work.

-------

Zen and Zen2 have two CCX however, so it seems like for Zen / Zen2, an even-number was only possible. But with Zen3 rumored to have 1x CCX per chiplet, we're back to the days of potentially having odd core counts.

 

[DemonicRyzen666]

Really hard to say, but moving to DDR5 will probably entail a new socket and I imagine a new I/O die as well. Moving to 5nm on the other hand shouldn't require DDR5 so in that sense AMD has two possibilities. The chips and the chipset I feel could support DDR4 and DDR5 with different I/O die's and with different sockets. There is a minor possibility that AMD could ease the transition from DDR4 to DDR5 by allow two platforms to cater to both for Zen4 at 5nm.

In a lot of ways that a more ideal option than hybrid motherboards that support both memory types, but a good stop gap remedy for those that can't just outright afford to by new memory that tends to be expensive and not all that mature early in it's life cycle. It even opens a bit of a avenue for a upgrade later to a new socket with more mature DDR5 down the road with the same CPU and possibly a new chipset as well since DDR5's life cycle should span quite a awhile major memory architecture changes tends to progress at a slower more drawn out pace.

I think it would be more ideal to have more transitional and phased upgrades like that anyway where you don't necessarily just have that more massive upfront cost of buying everything much more periodically. Buying into increased improvements a bit a time is a easier pill to swallow to the end user. So certainly something that needs to be weighed. I think I'd be more inclined to buy into Threadripper's DDR4 EOL chip down the road rather than moving to DDR5 to be honest. At least based on my current situation. I just don't plan to replace my DDR4 memory in a real hurry quite so soon. I'm not sure what will happen with Zen4, but I guess with ThreadRipper I'm somewhat covered in either case. That said I would enjoy seeing a 5nm DDR4 Ryzen CPU personally or scaled back core count ThreadRipper DDR4 octa-channel chip with higher frequency boost would be interesting.

Having both ddr4 and ddr5 adds to much complexity for the iod and is waste of silicon. it drives up the price of Iod.

 

[HugsNotDrugs]

There is no point in making a 10 core part. There will be no chips coming from the manufacturing line with 5 non functioning cores. The only sane choices this time are 7, 8, 14 and 16 core parts. If they go with 6 and 12 core parts it means that they contain working, but disabled cores and that AMD is yielding 14% of multi threaded performance gains just to do artificial product segmentation.

Based on the publicly available information given by TSMC and the assumption that zen3 chiplets are about the same size as zen2 chiplets 97% of ’6 core chiplets’ contain 7 working cores with one disabled. In previous processors it made sense to do 6 and 12 core parts, as each CCX had to have identical number of cores and an extra core had to be disabled anyway. Also the error rate of the process was a lot higher than the current ~0.09 per cm^2.

I think you're right but AMD will want to protect the higher margin high-performance products by creating a meaningful performance delta.