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AMD's Robert Hallock Confirms Lack of Manual CPU Overclocking for Ryzen 7 5800X3D

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I guess that explains the lower core clocks. It's because of the lower voltage and none oc. Meh It's not a chip for me then.

Stick to my 5600X and 5950X.

Bit fair enough if the v-cashe could be damaged. Let's just hope that is not the case for Zen 4 as well. Can you imagine all Zen 4 cpu being locked for OC?
 
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Closer to the very end, last 5 minutes or so, they tried to pry info from Robert H. on the plans of AM5s longevity. Although nothing is concrete yet, my magic 8-ball™ says there might be something more to that discussion.

Let's just hope that is not the case for Zen 4 as well. Can you imagine all Zen 4 cpu being locked for OC?
if thats the case with zen4, it will be incremental updates instead of a full upgrade. But, always a but, will AMD divide into the big cache for gaming and continue normalcy, per se, for the rest of the chip line up.
 

bug

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So, this Frankenstein's creation isn't sewed together very well, is it?
 

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Its the Xtreme!!! Gaming Processor ;)
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20th of April apparently.
Ended up ordering a 5800X, as they dropped to $15 more than the MSRP of the 5700X here, pretty much over night.
I guess that they were high as hell when they priced this and it's launching 20th of April..
 

SL2

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I was kind of thinking to not wait and buy that 5800x3d, almost. I want to upgrade now, its so hard not to go nuts now, but I think the wait for next gen and am5 will be well worth that wait.
AM4 will stay for quite some time according to Su. At the same time, I don't expect AMD to launch AM5 CPU's with the kind of high prices that Vermeer had, now that the competition is real.
I do expect AM5 boards to cost more, tho.
 
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So it's pretty safe to assume a CPU architecture more fundamentally designed with this feature in mind (rather than having connectors for it added because it was in development and needed a test vehicle) will have a separate cache voltage rail, right? This is probably non-trivial given how closely tied cache is to the cores, but that would seem like the logical way forward.


As for this news more broadly: if it only means there's no manual, multiplier-based OC, but PBO and CO are still there ... who cares? All-core fixed-multiplier OC on Ryzen is a pretty bad idea unless you're consistently running 100% load nT workloads anyhow. There's no reason why anyone should use that over PBO and CO tuning, unless what you're going for is worse performance and higher power consumption.
 
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Closer to the very end, last 5 minutes or so, they tried to pry info from Robert H. on the plans of AM5s longevity. Although nothing is concrete yet, my magic 8-ball™ says there might be something more to that discussion.


if thats the case with zen4, it will be incremental updates instead of a full upgrade. But, always a but, will AMD divide into the big cache for gaming and continue normalcy, per se, for the rest of the chip line up.
It's difficult to say. Maybe 5800X3d is some sort of a test drive. How many addopt it compared to 5800X. There may be Zen 4 with and with out 3d cashe as well.

But no oc on Zen 4 will be a huge disappointment for me.
 
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It's difficult to say. Maybe 5800X3d is some sort of a test drive.
It clearly is - it's the first product to hit the market with a brand-new technology; it's relatively limited in scope (one SKU, the last product for a five-year-old platform, etc.) and they have announced no plans for further models for this platform with the feature. Definitely a test drive.
How many addopt it compared to 5800X. There may be Zen 4 with and with out 3d cashe as well.
Almost definitely. It doesn't make sense on all SKUs, but a wider roll-out on a chip more thoroughly adapted to this (with a separate cache voltage rail, for example) would make a lot of sense. Something like every tier from x6xx or x8xx upwards having a 3D cache-enabled top-end SKU would make sense (i.e. 7600 65W, 7600X3D 105W, 7800 65W, 7800X3D 105W, etc.). This would make a lot of sense if they can make the cache die on 7nm even when the CCDs move to 5nm, as that would free up capacity to churn out more cache dice.
But no oc on Zen 4 will be a huge disappointment for me.
Just to be clear: no multiplier-based, fixed frequency and voltage OC is not "no OC". PBO and Curve Optimizer are still ways of overclocking, and they seem to be supported here. They also deliver better results in general on Zen2 and Zen3 than old-school OC techniques.
 
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Oh dear...
 
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Last time I overclocked a CPU was a AM2 CPU and havent touched OC either on my 4770k or 3700x.
 
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Yeah, but it is indeed a higher chip(s) inside that CPU.

"Our highest chip launches on 4/20"

Makes sense.
"It smokes... the competition".
 
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So comparing new 3D cache Ryzen at fixed frequency (4 GHz) in AMD presentation and stating 15% uplift in gaming was quite dishonest, since new 5800X3D will not achieve 5800X frequency!

 

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So comparing new 3D cache Ryzen at fixed frequency (4 GHz) in AMD presentation and stating 15% uplift in gaming was quite dishonest, since new 5800X3D will not achieve 5800X frequency!

What's dishonest with that? It was a technology demo of a CPU they never launched.
 
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I'm missing something here, every CPU ever launched has a limit he shouldn't be pushed beyond.
If we can't even try to OC is because it's already at that limit. If 1.35 is the limit is should be at something more moderate and we could use sylicon lottery to try and push it a bit further like any CPU before it.

So i assume this is just a CPU really pushed to it's limits just to compete with Intel.
 
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I'm missing something here, every CPU ever launched has a limit he shouldn't be pushed beyond.
If we can't even try to OC is because it's already at that limit. If 1.35 is the limit is should be at something more moderate and we could use sylicon lottery to try and push it a bit further like any CPU before it.

So i assume this is just a CPU really pushed to it's limits just to compete with Intel.
It seems to be a bit more complex than that thanks to the specifics of the cache die. The CPU cores themselves likely handle higher voltages and frequencies just fine, but if the cache die is on the same voltage rail as the cores and risks damage above 1.35V, then obviously the cores can't be allowed to go that high either. And seeing how cache and logic have quite different characteristics in silicon, especially when using different libraries (the cache die is ~2x the density of the cache on the CCD, after all), so it likely just isn't designed to scale in the same way.
So comparing new 3D cache Ryzen at fixed frequency (4 GHz) in AMD presentation and stating 15% uplift in gaming was quite dishonest, since new 5800X3D will not achieve 5800X frequency!

That's a prototype of an unreleased product. I doubt AMD would launch the 5800X3D unless it was faster than the 5800X - if it didn't make sense, they would make a lot more money selling those stacked dice in Epyc chips where HPC/server vendors would gobble them up at much higher prices. But ultimately, we'll have to see how this pans out in real-world reviews.
 
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Just lock the voltage but allow the multiplier to be changed? Can't be that complicated...
 

SL2

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If 1.35 is the limit is should be at something more moderate and we could use sylicon lottery to try and push it a bit further like any CPU before it.
How are you going to do that when manual OC is disabled?
So i assume this is just a CPU really pushed to it's limits just to compete with Intel.
No.
Even if Alder Lake wasn't released yet, AMD would want the X3D to be as close to the 5800X clock frequencies as possible, otherwise it wouldn't make much sense in launching it.
AFAIK, the 3D cache is primarily made for Milan-X.
 

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The technical reason for this limitation is interesting, but as a customer, I just it to overclock, so I'd pass on this model.
 

SL2

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The technical reason for this limitation is interesting, but as a customer, I just it to overclock, so I'd pass on this model.
The limitations may just as well be the very reason why we don't see more X3D models. Well that and the fact that most X3D's goes to Milan-X.
 
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