Bulldozer Core-Count Debate Comes Back to Haunt AMD

[FordGT90Concept]

My god, ffs. This stupid debate again? This is like the "Warning: Contents Hot" warning on coffee cups. What do they demand, the ALU and FPU counts be presented on the product packaging? You know what, lets just require the packaging list out every transistor and it's usage. That will clearly clarify things and will make sense to 99% of consumers, right?

I'm sorry to say it, but when consumers, generally speaking, don't know what's even inside a CPU or how it works, they're not really giving two shits weather or not the FPU is shared, what it's width is, or if it's two FPUs slapped together with FMA. If you try to explain floating point versus fixed point math to someone and the situations in which they're used and how it impacts performance, most people's eyes will glaze over because they don't know what the hell you're talking about. AMD needs to dumb it down to language that a typical consumer can understand. This isn't false advertising. This is someone who is still butt hurt over AMD producing a garbage CPU and using it as an opportunity to make some money.

We already know the FX CPUs where garbage. We don't need to dwell over that, but when push comes to shove, you can have a CPU without floating point units, you can't have a CPU without ALUs and AGUs.

...by the way, 2012 called. It wants its CPU back.

We wouldn't be having this conversation if AMD put "4 module" or "8 integer core" on the box instead of "8 core."

They did. With FX they redefined what a core was. Like you said if they did it once they can do it again.

core = independent CPU

Always was, always will be*.

* Except Bulldozer, Steamroller, and Piledriver but AMD is about to get bitch slapped for that mistake.


AMD made Microsoft count sockets instead of processors because each socket could house more than one processor (described as a core). It is accurate to describe 2700X as an 8 processor product. It is inaccurate to describe FX-8350 as an 8 processor product because there's only 4 independent processors in it.

 

[Vya Domus]

If the design was successful and other manufacturers turned to it, "modules" would slowly replace "cores" as what people looking towards when making a purchasing decision.

You're now speculating what could have been in an alternate future ? You're just really off the tracks with your argumentation, it's time to stop.

core = independent CPU

I could've very easily disabled 1 core from each "module" on my FX 6300 and guess what Windows would boot just fine and software ran as it should, floating point functionality still intact. How could that have worked if Piledriver didn't have independent cores ? What am I missing ? Can you still not see that your assertion that something like the 8350 didn't have 8 independent core is plain and simple wrong ?

 

[eidairaman1]

Hopefully this lawsuit will discourage AMD from using such a cludgy, low performance compromised design in the future.

They already learned hence Zen

 

[cdawall]

core = independent CPU

Always was, always will be*.

* Except Bulldozer, Steamroller, and Piledriver but AMD is about to get bitch slapped for that mistake.

How many clock cycles would it take for an BD module to process two single cycle cost integer math tasks.

How much is the multicore speedup for integer math tasks between a 4 module AMD is it around 3.xx or 7.xx? Now compare that to a traditional 4 core setup.

In these specific scenarios it is quite easy to see any and all argument to say that the AMD design act as any standard 8 core unit would. Just because single threaded performance was dreadful, doesn't have anything to do with it scaling linear across all 8 cores available assuming integer calculations.

 

[ghazi]

If you want to get technical, CPUs should be advertised by thread count rather than core/module count. The different ways to multithread though (there's 4 way, 2 way, and 1 way if not more), makes that a sketchy proposition.

Core count is a more accurate predictor of performance than thread count, and also is a term that common people are familiar with. Even in the case of Bulldozer, the 8-core chips scaled around ~6.7x in multithreaded workloads -- closer to 8 than 4, unlike quad-cores with SMT that don't do much better than 5x.

How many clock cycles would it take for an BD module to process two single cycle cost integer math tasks.

Along with two 128-bit single cycle FP instructions...

 

[Shambles1980]

how many cycles would bulldozer take to do 4x 256 fp calcs and 4 single cycle tasks of any kind ? (8 total tasks)

 

[eidairaman1]

If AMD wins then they have not learn what they did isn't ok. (If that fact be true). the money just goes to the lawyers and AMD doesn't get to keep money that they wrongfully took ie falsely sold a product.

it is a loose loose really but either way hopefully AMD has learned something from this

Amd already learned hence why the Zen Arch

 

[cdawall]

how many cycles would bulldozer take to do 4x 256kbit fp calcs and 4 single cycle tasks of any kind ?

We aren't talking about floating point calculations. The point is mute. FP does not have to exist for a core in any sense of the word.

 

[Shambles1980]

We aren't talking about floating point calculations. The point is mute. FP does not have to exist for a core in any sense of the word.

you fail to see the issue, or why there is even a law suit.

look at it like this if amd were right and the rest of us were wrong and there was never an issue.. well this thread wouldnt even exist.

hell if we were all wrong. amd wouldnt have had to beg ms to treat 1 module as a single core and the second "core" in that module as little more than hyper threading to prevent the bottle necks because 1 module couldnt do the same workas 2 cores when 2 actuall cores could.

you cant just sell people a bycicle without a front wheel and say it works fine, then after ppl complain say well you should know we meant you need to do a wheelie all the time.

 

[Vya Domus]

ms to treat 1 module as a single core and the second "core" in that module as little more than hyoer threading to prevent the bottle necks because 1 module couldnt do 2 processes at the same time when 2 actuall cores could.

What ? You are seriously out of touch with the subject.

 

[Shambles1980]

What ? You are seriously out of touch with the subject.

they genuinly did ask ms to re work how the processor was scheduled. and the only way to do that was to treat each module as 1 core with ht. (use a module 1st and only use the second "core" of the module if all other modules were in use.

and they did that because one module cannot do the same work as 2 real cores, which is also why zen uses real cores now.

 

[eidairaman1]

Ok no more pointless arguing.

4 module, each module has 2 cores sharing resources.

 

[Aquinus]

they genuinly did ask ms to re work how the processor was scheduled. and the only way to do that was to treat each module as 1 core with ht. (use a module 1st and only use the second "core" of the module if all other modules were in use.

and they did that because one module cannot do the same work as 2 real cores, which is also why zen uses real cores now.

Actually, that was only part of it and it's up to the OS to schedule tasks for the CPU, not the hardware. You do realize that the two integer cores also shared some other parts, such as the L2 cache. Switching between modules takes a performance impact because cache for the task at hand isn't going to necessarily be available at that level on another core in another module, in fact it's won't be. It's cheaper to switch to a core with a shared cache because it doesn't have to dive into L3 or memory to get the data that's already resident in the L2 of a particular module. From a performance standpoint, context switching to a core on the same module is less expensive than switching to a core in another module. This isn't just about diving up the load between the modules, but making sure tasks stay where they'll run fastest, which means not scheduling them to just any core that's available.

Also, just because it doesn't scale perfectly doesn't mean it's not two different cores. Two lite cores are still two cores.

 

[cdawall]

you fail to see the issue, or why people there is even a law suit.

If that is your argument that the single FPU per module, then I guess the 486SX isn't a CPU at all. It could do exactly 0 FP calculations total.

I absolutely see the issue. AMD changed what a portion of people considered to be a core. The IEEE would be pretty openly considered the subject matter experts on all things electrical correct? With its 420000 members?

Because they signed of on the verbiage of 2-core module for chip-level multithread or CMT as AMD labeled it for the Bulldozer design. If this lawsuit makes it to fruition that on its own should have it dismissed. The experts across the board approved the phrasing.

Here are a couple of IEEE documents for you to read on the subject

https://ieeexplore.ieee.org/document/6060836

This is from all the way back in 2010, where yet again BD is referenced openly in IEEE publications as using cores. This even states how the cores are sharing resources.

Just adding traditional cores isn’t going to be enough, says AMD’s Moore. The scheme may have saved the power-versus-performance curve for a time, but it won’t do so forever. “These days, each core is only getting 8 or 10 watts,” he says. “In some sense we’re running back into that power wall.” With its new Bulldozer architecture, AMD has managed to buy some breathing room by finding a set of components that the cores can share without seriously degrading their speed. But even so, Moore’s best guess is that 16 cores might be the practical limit for mainstream chips.

https://spectrum.ieee.org/semiconductors/processors/multicore-cpu-processor-proliferation

 

[Shambles1980]

you genuinly think that quoting the claims of the company that is in court for lying is the best way to prove they were not lying??
i cant even begin to tell you how rediculous that is.

Like i keep saying agree to disagree but if i ever want to sell something thats missing bits and does not work as intended il let you know.

 

[Aquinus]

you genuinly think that quoting the claims of the company that is in court for lying is the best way to prove they were not lying??

IEEE is not AMD.

 

[Shambles1980]

IEEE is not AMD.

1st line of the quote
"Just adding traditional cores isn’t going to be enough, says AMD’s Moore. "

which Also right there says they arent cores. AMD said they arent cores right there in that stupid thing you just quoted.

oh and the paper is for a "module" not a "core"

All the evidence you bring just contradicts what you say.. and yet you still say it!

 

[ValenOne]

Even Execution Unit or Integer Unit does not necessarily mean the same thing across different architectures. For example, Bulldozer Integer Unit had 2 ALUs (Arithmetic Logic Unit) and 2 AGUs (Address Generation Unit) while Zen's Integer Unit has 4 ALUs (even though with a bit more resticted set of operations if I remember correctly) and 2 AGUs. Zen core has effectively the same integer calculation capacity in its Integer Unit that Bulldozer has.

Bulldozer module couldn't allocate most of it's four ALU and four AGU resource towards a single "uber" thread.

For integers, typical hyper-threading CPU has strong and weak threads.

 

[Aquinus]

1st line of the quote
"Just adding traditional cores isn’t going to be enough, says AMD’s Moore. "

which Also right there says they arent cores. AMD said they arent cores right there in that stupid thing you just quoted.

oh and the paper is for a "module" not a "core"

All the evidence you bring just contradicts what you say.. and yet you still say it!

You're the only person I quoted, bub. I'm not @cdawall. Also IEEE has members from just about every major hardware vendor.

Gimme your keys, @Shambles1980. You're drunk.

 

[Shambles1980]

You're the only person I quoted, bub. I'm not @cdawall. Also IEEE has members from just about every major hardware vendor.

so you just gonna ignore the quote was actually from amd, and the paper is for modules not cores. and just pretend that amd didnt say they were not cores in the actuall thing being used to prove they are cores and just keep on going?

right fine i guess, not much i can do in the light of that.

although i will admit i thought you were the one that quoted it, so il confess to that.

 

[Aquinus]

so you just gonna ignore the quote was actually from amd, and the paper is for modules not cores. and just pretend that amd didnt say they were not cores in the actuall thing being used to prove they are cores and just keep on going?

right fine i guess, not much i can do in the light of that.

That's right. A module isn't a core. It has a lot more than a single core would typically ever have. My point stands.

Gimme your keys, @Shambles1980. You're drunk.

 

[Shambles1980]

That's right. A module isn't a core. It has a lot more than a single core would typically ever have. My point stands.

and less than 2 cores would have, point is mute.

no one complained for them bing modules.. the issue is they call them 8 cores when they are demonstrably not.

 

[Aquinus]

and less than 2 cores would have.

I thought I had addressed that already. Perhaps you should actually read what people have been saying to you.

Two lite cores are still two cores.

The integer cores had fewer ALUs and AGUs than a Phenom 2 core did. They were literally two lesser cores for the price of 1, not two phenom cores. The result was less performance per core.

Edit: That means fewer instructions per clock per core compared to its predecessor.

 

[Shambles1980]

maybe they should have labled them as lite... oh wait thats the point.

I dont mind them calling them Lite cores. or integer cores or imaginary cores.. hell they could have called them anything they wanted aslong as they defined the difference to the avarage idiot on the street
but they didnt sell them like that which is the issue.
I dont see how you cannot comprehend that.

 

[Aquinus]

maybe they should have labled them as lite... oh shit wait

Maybe Intel should have labeled Haswell "extra beefy" when they added some. Keep reading, you're not done.

My god, ffs. This stupid debate again? This is like the "Warning: Contents Hot" warning on coffee cups. What do they demand, the ALU and FPU counts be presented on the product packaging? You know what, lets just require the packaging list out every transistor and it's usage. That will clearly clarify things and will make sense to 99% of consumers, right?

I'm sorry to say it, but when consumers, generally speaking, don't know what's even inside a CPU or how it works, they're not really giving two shits weather or not the FPU is shared, what it's width is, or if it's two FPUs slapped together with FMA. If you try to explain floating point versus fixed point math to someone and the situations in which they're used and how it impacts performance, most people's eyes will glaze over because they don't know what the hell you're talking about. AMD needs to dumb it down to language that a typical consumer can understand.