Memory is EDO RAM, 72-pin SIMM (The tilting type)
This is before DDR1 was invented, and that socket is a 486 slot (for 486 SX, DX, DX2 and some DX4 variants).
Not 100% sure about which chip is doing what, so if you have more knowledge, then correct me please.
EDIT: "
??" on the left is the RTC (Realtime Clock) chip + Memory for BIOS (The one that keeps the system settings, using the battery below it).
Back then the BIOS chip was just a raw EEPROM, no logic in it, it needed a secondary chip to actually read and send to the CPU what was stored in it.
Why are there 9 Cache chips ? Simple: 8 for data, 1 for party. Because "cache" was socketed, it was prone to error... and imagine you read one thing from memory and getting something else into the CPU because cache was f*ed up.
Most people's PC's at that time didn't have the cache chips inserted (but you could buy and add them, for a significant boost in performance !).
This changed with the next generations, Pentium and AMD 5x86 (An 486 with integrated L2 cache), making these external chips unnecessary.
Edit:
ISA slots are 16-bit, before them the 8bit slots existed, which lack the "2nd" part.
Vesa Local Bus added another faster separate 32-bit connection that was going STRAIGHT to the Memory controller (basically, a VLB card could access system RAM directly, which caused a LOT of headaches when malfunctioning. Also security issues, because a VLB card could skip the CPU completely and do whatever it wanted to the system ram)
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Order of invention of system buses:
ISA 8 -> ISA 16 -> ISA 16 + VLB -> PCI (original) -> AGP -> PCI (Express)
Original PCI is PARALLEL, it had a 32-bit connection running at a very low 33Mhz, later expanded to 66Mhz.
PCI Express is SERIAL, it has an 1-bit connection at a massively faster rate, and can be extended by using multiple lanes (up to 16, or even 32 for some rare server boards during the era of PCI Express 1.0 and 2.0), and is also full-duplex (it can read and write at the same time, which the original PCI or AGP could not do - They had to wait until one operation is complete before starting a new one)
The communication logic of PCI Express still keeps the original PCI standards, however it is done in a different way (with the parallel data reassembled at the endpoints by internal controller units).
ISA = Industrial Standard Architecture
VLB = VESA Local Bus ( Local, as in it's on the same level as the CPU, it accesses RAM directly)
PCI = Peripherical Computer Interconnect (It's always behind a controller chip, devices DO NOT have direct access to RAM)
AGP = Accelerated Graphics Port (Works the same as PCI, but doubles the frequency, and keeps doubling it (AGP 1 = 2x PCI, AGP 2x = 4x PCI, ... AGP 8x = 16x PCI). This is still slower than PCI-Express 16x (Gen1)
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For storage connection:
MFM (harddisk without any logic on it, the heads were just following commands coming through the cable) -> IDE (Integrated Drive Electronics, YAY - Integrated); Later it became the ATA strandard -> SATA is just ATA, but serial (and got several extensions), and finally -> PCI Express (in the shape of U.2 and M.2)
Serial/Parallel I/O were eventually converted into USB (and coexisted for a while), then USB became faster and faster, and eventually became PCI-e as well as part of USB 3.1 Gen2 ( Thunderbolt over USB )
Floppy still used MFM (Modified Frequency Modulation), which is why some people are able to create music from floppies, because you can tell it EXACTLY how much to move and at what frequency)
Did I miss anything?