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[AcE]

Can you explain what is effective bandwidth?

Already basically did, it's the combination between the caches + vram bandwidth. AMD used this some times in their slides, giving a huge number in the mid 1 TB/s or higher.

No, 4090 does not have a ton of cache.

The full chip has 96 MB, regardless, 72 MB IS a lot of L2 cache. You seem to compare it to the wrong metrics (probably L3 cache). Even AMD reduced it to 96 MB max. - it is a lot.

Not going to google right now but IIRC AMD caches have more bandwidth almost throughout the whole thing.

No, L2 cache is generally faster than L3 cache, does not matter which kind of processor. AMD can not dream about having faster cache especially because it now goes into chiplets, not even on the same chip anymore, which decreases efficiency further.

 

[londiste]

Already basically did, it's the combination between the caches + vram bandwidth.

How are these combined to get the effective bandwidth?

 

[AcE]

How are these combined to get the effective bandwidth?

You calculate the speed of the Cache against the bandwidth of the vRAM, it's an average. Edit: this is my take, AMD just states the *maximum* bandwidth instead, which is 3.5 TB/s for XTX and 2.9 TB/s for 7900 XT. 6900 XT's max. bandwidth is ~2 TB/s.