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Intel is skipping 10nm and going straight to 7nm, competition = nom nom for my tummy?

Intel's 14nm+ node is more dense than GloFo 12nm which is AFAIK closer to 16nm in reality.

This is why nanometers don't say much. Too much marketing involved these days. I look at performance.
 
It isn't just about process node (density) or is it? Otherwise VII would be the king of the hill, Ryzen is an efficient architecture & I'd argue at par with the latest *lake. The fact that AMD can compete so well with a node disadvantage & clock speed deficit speaks volumes about Ryzen. Intel's lead in the x86 space is a combination of their process node -> clock speeds & architecture. Just going to 7nm or whatever doesn't guarantee anything.
 
It isn't just about process node (density) or is it? Otherwise VII would be the king of the hill, Ryzen is an efficient architecture & I'd argue at par with the latest *lake. The fact that AMD can compete so well with a node disadvantage & clock speed deficit speaks volumes about Ryzen. Intel's lead in the x86 is a combination of their process node->clock speeds & architecture. Just going to 7nm or whatever doesn't guarantee anything.

Ryzen is fairly efficient but part of this has to do with the much lower clockspeed.

Radeon VII is not exactly power efficient even at 7nm, so yeah architecture matters more than node
 
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Not exactly, every chip has a certain efficiency curve which goes awry only after you increase the clock speeds or voltage, it of course depends on the uarch & process node -
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https://forums.anandtech.com/threads/ryzen-strictly-technical.2500572/

This is exactly why server processors are clocked low, not because they can be clocked only so much. You increase the clocks/voltage then the perf/W nose dives, server chips need the best perf/W curve possible.
 
Even if this scenario resulted in another 5% market share lost for a year, it will likely be better than putting even more money into 10nm development and building semiconductor plants for a process that will be obsolete within 2 years.
We have zero info about how efficient Intels 10 nm will be, and that's why we can't say when it will be obsolete. And, we don't know how much more money Intel has to put in to make it competitive.

I would guess that Intel has come too far with 10 nm to skip it now. Only speculations says otherwise. Skipping 10 nm would be taking a big risk, because Intel would then have to rely on 7 nm even more, without knowing when it will be finished. 10 nm may sound obsolete, but it's much needed until 7 nm. Otherwise, Intel would be acting like they've learned nothing from the delayed 10 nm.

10 nm was supposed to come instead of Kaby Lake, and people wanted something better than a 7700K. Then came the 8700K which showed that 14 was still usable.

The 9900K on the other hand clearly shows the need for a smaller process node, even if it's a very powerful CPU. It's ambiguous/incorrect TDP is proof enough.
 
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Hopefully 7nm node works out better for them. As mentioned by others, the node size is largely marketing. A better way to measure transistor size is Contacted Gate Pitch and Minimum Metal Pitch. Intels 14nm process was competitive in transistor size with TSMC 10nm despite the marketing being "4nm larger". I read that the Intel 7nm would be equivalent to 5nm TSMC.

Maybe obsolete article with projections of sizes for Intel, TSMC, Samsung https://www.semiwiki.com/forum/content/7544-7nm-5nm-3nm-logic-current-projected-processes.html
 
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12/14/16nm gives us 35 MTx/mm2
7nm TSMC - 95 MTx/mm2 - 2080 Ti on 300mm2. imagine that as big as 1660Ti.
5nm tsmc - 185
3nm tsmc / 7nm intel. - 245 MTx/mm2.
 
Hopefully 7nm node works out better for them. As mentioned by others, the node size is largely marketing. A better way to measure transistor size is Contacted Gate Pitch and Minimum Metal Pitch. Intels 14nm process was competitive in transistor size with TSMC 10nm despite the marketing being "4nm larger". I read that the Intel 7nm would be equivalent to 5nm TSMC.

Maybe obsolete article with projections of sizes for Intel, TSMC, Samsung https://www.semiwiki.com/forum/content/7544-7nm-5nm-3nm-logic-current-projected-processes.html

It just means how many more transistors can be squeezed into the past node size and with that the less voltage required to do the switching and switching speeds being faster. There is a point of diminishing returns after a certain amount of transistors are inside a die due to heat/power requirements going outside of intended design specs.
 
They should have made this call years ago. It's like NetBurst all over again. Intel likes beating dead horses.

10GHZ, the dream.

It's the corporate "No this is still a good idea, please let me keep my job shtick".
 
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