I mean I'm not going to disagree that you can have faster and slower cores, but irrespective of that consoles are still developing around 8 cores and 16 threads so meeting or exceeding that is ideal.
If it fixes the degradation problems.... that might be the way.
Well of course it wont. Thats the whole point of ecores. They give better multicore performance with less die space.
Yup exactly the 12P is more to bump up ST and offer a chip that's more affordable. It'll probably be fairly similar to a14600K in MT actually. It might be a bit quicker though due to some of the changes beyond simply inserting more P cores. I think the 14600K will almost assuredly beat the 10P core version even in spite of that I suspect, but I didn't really crunch the math on that. If I remember right 4E cores is similar to 2P cores in MT at least with HT, but w/o it that changes things. If you bump up cache and adjust IPC and frequency it probably balances out pretty close anyway in spite of removing HT. The big perk is the much higher ST which is good for every workload. It's a pretty significant bump.
I really think Intel should consider doing the opposite of a low power island with a single P core in some manner where they isolate a P core or maybe all the P cores with a bit of a thermal buffer space to make it easier to boost and/or at lower voltages since heat makes it more difficult to run lower voltages.
I don't know how they would go about that 100%. I think they could have like a cache between low power and regular E cores and another cache between the standard E cores and P cores. They should probably maybe considering using as many low power E cores as they do the amount of P cores so the regular E cores are more the higher density cores and balanced in the middle, but then has access to a bit of shared cache with low power E cores and high power P cores. They could get priority access to the cache from the low density cores that shared, but wouldn't get priority access from the shared cache with P cores.
Something like that might be possible and work reasonably, but idk it would probably be a bit of a engineering challenge to figure out how to arrange of all it in the manner. It would spread the heat out a bit though by having a shared cache in between clusters of core types.
