W00t! DDR5 memory for Alder Lake Review is here

[Shou Miko]

Please watch this video. It's not the kind of ECC most people are thinking of when ECC is mentioned.

I will watch it when I got home / have some time later and thanks @TheLostSwede

 

[c2DDragon]

That's a sexy kit !
I wonder if you can tighten the timings considering you are at 1.3V on this kit instead of something like 1.1V.

 

[R0H1T]

DDR5 on-die ECC is at best partial ECC

It's also because ECC can't run with XMP (rated) speeds.

 

[Valantar]

It's also because ECC can't run with XMP (rated) speeds.

... But not all DDR5 has XMP profiles. So, while that applies in this specific case, it's hardly illuminating in any useful way.

 

[cadaveca]

That's a sexy kit !
I wonder if you can tighten the timings considering you are at 1.3V on this kit instead of something like 1.1V.

Gonna be interesting to see what clocks are possible too. Good times.

 

[Wirko]

As someone else very helpfully taught me here on the forum (sorry, I can't remember who it was, might have been @TheLostSwede?), DDR5 on-die ECC is at best partial ECC, and does not provide the same type of data integrity protection as regular DRAM ECC. On-die ECC means there is ECC for data as long as it is stored on the DRAM chip itself, but there is no ECC for in-flight data, where it is more vulnerable to interference and bit flips. It's still better than nothing, but it's not that big of a deal. Anything that warrants ECC (where data integrity is really important) still needs full ECC DIMMs.

That's exactly how I understand it too (but there's not exactly an abundance of technical data available about DDR5).

On-die ECC has become somewhat of a necessity as DRAM cells keep shrinking and becoming less reliable with each new process node. It should detect bit flips due to cosmic rays, other radiation*, rowhammer attacks, bad cells, other reasons, or no reason at all. ECC on the data bus complements that and should be able to detect bit errors due to bad electronics in RAM chips or IMC, bad contacts in slots, overclocking, other reasons, or no reason at all.

* because most materials, and chip packaging too, contains some unstable isotopes.

 

[bug]

Please watch this video. It's not the kind of ECC most people are thinking of when ECC is mentioned.

The problem with that guy explaining how stuff works is he almost makes me feel like I'm underpaying for my PC parts

 

[Shou Miko]

Please watch this video. It's not the kind of ECC most people are thinking of when ECC is mentioned.

Interresting really so while there is some ECC it's not like we know ECC today because with the normal ECC as we know we can only follow JDEC specs and not OC because that will mess with the ECC.

I am wondering how this is gonna pan out, then it sounds more then a gimmick like oh wait DDR5 have ECC that we can sell on like ECC helps not corrupting your game while gaming get it now!

 

[TheLostSwede]

Interresting really so while there is some ECC it's not like we know ECC today because with the normal ECC as we know we can only follow JDEC specs and not OC because that will mess with the ECC.

I am wondering how this is gonna pan out, then it sounds more then a gimmick like oh wait DDR5 have ECC that we can sell on like ECC helps not corrupting your game while gaming get it now!

It's not a gimmick, it's a required part of the spec, as it's highly likely that DDR5 wouldn't function properly at higher speeds without it. It might not be needed at 4800MHz, but it's likely to make a difference at higher speeds.

As explained, it also allows for better usable yields of edge case DRAM cells, so the manufacturers get higher yields overall. As with flash cells, there are DRAM cells that are better and worse at holding the charge and in the case of DRAM it's until it's being refreshed as explained in the video. The on-die ECC should prevent any bit flips due to an edge case cell being finicky.

The issue is more about how some companies are promoting it and I've already had words with some people I know in the industry. I was told by at l one company that they're going to change their marketing language after a lengthy discussion about it.

The confusion is of course that people that are aware of ECC DRAM are expecting in flight ECC, which this is not.

 

[bug]

Interresting really so while there is some ECC it's not like we know ECC today because with the normal ECC as we know we can only follow JDEC specs and not OC because that will mess with the ECC.

I am wondering how this is gonna pan out, then it sounds more then a gimmick like oh wait DDR5 have ECC that we can sell on like ECC helps not corrupting your game while gaming get it now!

As Ian explains, ECC isn't something to worry about for home users. And yet, with this thing in place, we get slightly better DIMMs anyway.

 

[Vayra86]

Even for gaming in certain cases 16Gb is not enough, i upgraded to 32gb because of anno 1800.

Eh... that seems completely bonkers to me, proof is required for a claim like that. Most notably because in most of my games, I don't even get to see upwards of 11 GB usage, and I play a lot, if not almost everything.