AMD Announces New AGESA 1.2.0.2, 105W cTDP for 9700X and 9600X, Intercore Latency Improvements
AMD today made four key announcements for its Ryzen 9000 series "Granite Ridge" desktop processors based on the "Zen 5" microarchitecture. These mainly aim to improve upon the products as originally launched in August. To begin with, AMD announced a 105 W cTDP (configurable TDP) mode for the Ryzen 7 9700X and Ryzen 7 9600X processors, with full warranty coverage. This setting can be enabled in the UEFI setup program of a motherboard running its latest version of UEFI firmware, which encapsulates the AGESA ComboAM5 PI 1.2.0.2 microcode. The setting raises the PPT (package power tracking) value of the 9700X and 9600X to 140 W, and treats them as if they were 105 W TDP processors. These chips were originally launched by AMD with 65 W (88 W PPT), and as reviewers quickly found out, unlocking power improves performance at stock clock speeds, as it improves boost frequency residence of these chips.
Next up, is the AGESA PI 1.2.0.2 microcode itself, which introduces the 105 W cTDP mode for the 9700X and 9600X along with warranty coverage, which we just talked about; plus works to improve the core-to-core latency on the Ryzen 9 9900X and Ryzen 9 9950X. These are processors with two CPU complex dies (CCDs), each with either 8 or 6 cores enabled. To the software, this is still a single-socket (1P) CPU with 12 or 16 cores. Although some awareness of the dual-CCD architecture is added to the OS scheduler to help it localize certain kinds of workloads (such as games) to a single CCD, reviewers noted that core-to-core latency on the dual-CCD chips was still too high, which should affect performance when a software's threads are migrating between cores, or if a workload is multithreaded, such as media encoding. AMD addressed exactly this with the new AGESA PI 1.2.0.2 update.
Next up, is the AGESA PI 1.2.0.2 microcode itself, which introduces the 105 W cTDP mode for the 9700X and 9600X along with warranty coverage, which we just talked about; plus works to improve the core-to-core latency on the Ryzen 9 9900X and Ryzen 9 9950X. These are processors with two CPU complex dies (CCDs), each with either 8 or 6 cores enabled. To the software, this is still a single-socket (1P) CPU with 12 or 16 cores. Although some awareness of the dual-CCD architecture is added to the OS scheduler to help it localize certain kinds of workloads (such as games) to a single CCD, reviewers noted that core-to-core latency on the dual-CCD chips was still too high, which should affect performance when a software's threads are migrating between cores, or if a workload is multithreaded, such as media encoding. AMD addressed exactly this with the new AGESA PI 1.2.0.2 update.