Marvell Technology, a leader in data infrastructure semiconductor solutions, today expanded its connectivity portfolio with the launch of the new Alaska P PCIe retimer product line built to scale data center compute fabrics inside accelerated servers, general-purpose servers, CXL systems and disaggregated infrastructure. The first two products, 8- and 16-lane PCIe Gen 6 retimers, connect AI accelerators, GPUs, CPUs and other components inside server systems.

Artificial intelligence (AI) and machine learning (ML) applications are driving data flows and connections inside server systems at significantly higher bandwidth, necessitating PCIe retimers to meet the required connection distances at faster speeds. PCIe is the industry standard for inside-server-system connections between AI accelerators, GPUs, CPUs and other server components. AI models are doubling their computation requirements every six months1 and are now the primary driver of the PCIe roadmap, with PCIe Gen 6 becoming a requirement.

Introspect Technology, a JEDEC member and a leading manufacturer of test and measurement instruments, announced today that it has shipped the M5512 GDDR7 Memory Test System, the world's first commercial solution for testing JEDEC's newly minted JESD239 Graphics Double Data Rate (GDDR7) SGRAM specification. This category-creating solution enables graphics memory engineers, GPU design engineers, product engineers in both memory and GPU spaces, and system integrators to rapidly bring up new GDDR7 memory devices, debug protocol errors, characterize signal integrity, and perform detailed memory read/write functional stress testing without requiring any other tool.

The GDDR7 specification is the latest industry standard that is aimed at the creation of high-bandwidth and high-capacity memory implementations for graphics processing, artificial intelligence (AI), and AI-intensive networking. Featuring pulse-amplitude modulation (PAM) and an improved signal to noise ratio compared to other PAM4 standards used in networking, the GDDR7 PAM3 modulation technology achieves greater power-efficiency while significantly increasing data transmission bandwidth over constrained electrical channels.

Artificial intelligence has been a hot topic this year, and everything is now an AI processor, from CPUs to GPUs, NPUs, and many others. However, it was only a matter of time before we saw an integration of AI processing elements into the networking chips. Today, Broadcom announced its new Ethernet switching silicon called Trident 5-X12. The Trident 5-X12 delivers 16 Tb/s of bandwidth, double that of the previous Trident generation while adding support for fast 800G ports for connection to Tomahawk 5 spine switch chips. The 5-X12 is software-upgradable and optimized for dense 1RU top-of-rack designs, enabling configurations with up to 48x200G downstream server ports and 8x800G upstream fabric ports. The 800G support is added using 100G-PAM4 SerDes, which enables up to 4 m DAC and linear optics.

However, this is not only a switch chip on its own. Broadcom has added AI processing elements in an inference engine called NetGNT (Networking General-purpose Neural-network Traffic-analyzer). It can detect common traffic patterns and optimize data movement across the chip. Specifically, the company has listed an example of the system doing AI/ML workloads. In that case, NetGNT performs intelligent traffic analysis to avoid network congestion in these workloads. For example, it can detect the so-called "incast" patterns in real-time, where many flows converge simultaneously on the same port. By recognizing the start of incast early, NetGNT can invoke hardware-based congestion control techniques to prevent performance degradation without added latency.

PCI-SIG is pleased to share the PCI Express (PCIe) 7.0 specification, version 0.3 is now available to members. Version 0.3 of the specification indicates that the first review draft of the specification is complete and has received work group approval. This is an important milestone for PCI-SIG, demonstrating we are on plan for a full specification release in 2025.

The PCIe 7.0 specification is targeted to support emerging applications such as 800 G Ethernet, AI/ML, Cloud and Quantum Computing; and data-intensive markets like Hyperscale Data Centers, High-Performance Computing (HPC), Edge and Military/Aerospace.

Molex, a company known for making various electronics and connectors, has today announced that the company has developed a first-of-its-kind chip-to-chip connector. Designed mainly for the data center, the Molex 224G product portfolio includes next-generation cables, backplanes, board-to-board connectors, and near-ASIC connector-to-cable solutions. Running at 224 Gbps speeds, these products use PAM4 signaling and boast with " highest levels of electrical, mechanical, physical and signal integrity." As the company states, future high-performance computing (HPC) data centers require a lot of board-to-board, chip-to-chip, and other types of communication to improve overall efficiency and remove bottlenecks in data transfer. To tackle this problem, Molex has a range of products, including Mirror Mezz Enhanced, Inception, and CX2 Dual Speed products.

Future generative AI, 1.6T (1.6 Tb/s) Ethernet, and other data center challenges need a dedicated communication standard, which Molex is aiming to provide. Working with various data center and enterprise customers, the company claims to have set the pace for products based on this 224G PAM4 chip-to-chip technology. We suspect that Open Compute Project (OCP) will be first in the line of adoption, ad Molex has historically worked with them as they adopted Mirror Mezz and Mirror Mezz Pro board-to-board connectors. The new products can be seen below, and we expect to hear more announcements from Molex's partners. Solutions like OSFP 1600, QSFP 800, and QSFP-DD 1600 already use 224G products.