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Intel Aims to "Re-Architect" Datacenters to Meet Demand for New Services

As the massive growth of information technology services places increasing demand on the datacenter, Intel Corporation today outlined its strategy to re-architect the underlying infrastructure, allowing companies and end-users to benefit from an increasingly services-oriented, mobile world. The company also announced additional details about its next-generation Intel Atom processor C2000 product family (codenamed "Avoton" and "Rangeley"), as well as outlined its roadmap of next-generation 14nm products for 2014 and beyond. This robust pipeline of current and future products and technologies will allow Intel to expand into new segments of the datacenter that look to transition from proprietary designs to more open, standards-based compute models.

"Datacenters are entering a new era of rapid service delivery," said Diane Bryant, senior vice president and general manager of the Datacenter and Connected Systems Group at Intel. "Across network, storage and servers we continue to see significant opportunities for growth. In many cases, it requires a new approach to deliver the scale and efficiency required, and today we are unveiling the near and long-term actions to enable this transformation."

Intel Launches Low-Power, High-Performance Silvermont Microarchitecture

Intel Corporation today took the wraps off its brand new, low-power, high-performance microarchitecture named Silvermont. The technology is aimed squarely at low-power requirements in market segments from smartphones to the data center. Silvermont will be the foundation for a range of innovative products beginning to come to market later this year, and will also be manufactured using the company's leading-edge, 22nm Tri-Gate SoC manufacturing process, which brings significant performance increases and improved energy efficiency.

"Silvermont is a leap forward and an entirely new technology foundation for the future that will address a broad range of products and market segments," said Dadi Perlmutter, Intel executive vice president and chief product officer. "Early sampling of our 22nm SoCs, including "Bay Trail" and "Avoton" is already garnering positive feedback from our customers. Going forward, we will accelerate future generations of this low-power microarchitecture on a yearly cadence."

IDF 2013 Transforming Computing Experiences from the Device to the Cloud

During her keynote at the Intel Developer Forum today in Beijing, Diane Bryant, senior vice president and general manager of Intel's Datacenter and Connected Systems Group, discussed how her company is helping users harness powerful new capabilities that will improve the lives of people by building smarter cities, healthier communities and thriving businesses.

Bryant unveiled details of upcoming technologies and products that show how Intel aims to transform the server, networking and storage capabilities of the datacenter. By addressing the full spectrum of workload demands and providing new levels of application optimized solutions for enterprise IT, technical computing and cloud service providers, unprecedented experiences can be delivered.

Intel Atom "Rangeley" Enterprise Processors Detailed

Intel's known lineup of low-power Atom processors based on the "Silvermont" micro-architecture spans across the "ValleyView" line of chips for tablets, nettops, and embedded systems, "Avoton" line for micro-servers, and a third line that completes the triad, "Rangeley." Designed for the networking and communications market, such as high-density switches, internet- and telephone-exchanges, etc., these chips are the first Atom-branded products to pack up to eight x86 CPU cores.

The eight-core chips are built into a single-chip SoC design. The cores feature out-of-order execution, much like "Avoton," CPU clock speeds of up to 2.40 GHz, and an instruction-set that's carefully measured for Rengeley's target application, which includes SSE4.1/SSE4.2, AES acceleration, VT-x, and x86-64. Rangeley is also among the first Atom chips to feature a dual-channel DDR3 integrated memory controller, supporting DDR3-1600 MHz, blurring the lines between it and other Intel processors. Thanks to out-of-order execution, the chip gains a 35 percent performance increment over previous-generation "Saltwell" architecture. Since it's an SoC, its core-logic is completely integrated into the CPU package. Connectivity includes PCI-Express 2.0 (a total of 16 lanes spread across 4 ports), two SATA 6 Gb/s ports, gigabit Ethernet MAC, and legacy I/O.
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