AMD today rolled out the new compacted Socket SP6 server platform designed for smaller servers locally deployed at the edge by organizations. With CPU core-counts of up to 64-core/128-thread, these processors are based on the "Zen 4c" microarchitecture, which comes with identical IPC and ISA to "Zen 4," but with smaller L3 cache available per core. The EPYC 8004 series targets traditional data-centers located on-site for organizations. Even if the heavy-lifting of the IT for them is performed by remote data-centers or cloud providers, organizations still need smaller edge server deployments. The EPYC 8004 series caters to a different kind of servers than the ones the lower core-count models of EPYC 9004 "Genoa" do.

With the EPYC 8004 series, AMD is debuting a new smaller CPU socket called SP6. The socket measures 58.5 mm x 75.4 mm, compared to the 76.0 mm x 80.0 mm of Socket SP5 powering EPYC 9004 "Genoa" and EPYC 97x4 "Bergamo." Socket SP5 is an LGA with a pin count of 4,844, compared to SP5, which is LGA-6096. The first line of processors for this socket, the EPYC 8004 series, are codenamed "Siena." These are very much part of the 4th Gen EPYC series, a lineage it shares with "Genoa" for data-center servers, "Genoa-X" for compute servers, and "Bergamo" for high-density cloud.

AMD in its recent interview with TechPowerUp had asserted that 3D Vertical Cache (or 3DV Cache), isn't a one-off technology and that it would be a continual part of its roadmap. In its 2022 Financial Analyst Day presentation, the company confirmed this, by announcing variants of its CPU chiplets that have 3DV Cache, extending to both the upcoming "Zen 4" microarchitecture, and the upcoming "Zen 5," which it unveiled today.

EPYC "Genoa" is codename for the upcoming line of server processors based on the "Zen 4" CPU microarchitecture, with CPU core-counts of up to 96-core/192-thread. These feature the standard "Zen 4" CCD. The company hasn't yet announced the last-level cache (L3 cache) size of the standard "Zen 4" CCD. The company will launch the EPYC "Genoa-X" processor, which much like the EPYC "Milan-X," will incorporate 3DV Cache, with a stacked L3 cache die on top of the chiplet. "Genoa-X" is slated for a 2023 debut.