MediaTek today announced the latest addition to its 5G portfolio, the T830 platform for 5G fixed wireless access (FWA) routers and mobile hotspot customer-premise equipment (CPE). The T830 is built with MediaTek's M80 modem which supports advanced Release 16 capabilities for sub-6 GHz band operations, making the platform ideal for 5G networks around the globe.

For device manufacturers, the T830's highly integrated, compact design provides big power savings and reduces development time and costs. The T830 makes it possible for operators to deliver 5G speeds up to 7 Gbps right out of the box using sub-6 GHz cellular infrastructure to avoid the costs of wireline technologies such as cable or fiber. Additionally, consumers can enjoy super-fast internet services from a small device that they can self-install, avoiding the hassles of lengthy installation times for fixed line broadband.

AMD Instinct MI200 will be an important product for the company in the HPC and AI supercomputing market. It debuts the CDNA2 compute architecture, and is based on a multi-chip module (MCM) codenamed "Aldebaran." PC enthusiast Locuza, who conjures highly detailed architecture based on public information, imagined what "Aldebaran" could look like. The MCM contains two logic dies, and eight HBM2E stacks. Each of the two dies has a 4096-bit HBM2E interface, which talks to 64 GB of memory (128 GB per package). A silicon interposer provides microscopic wiring among the ten dies.

Each of the two logic dies, or chiplets, has sixteen shader engines that have 16 compute units (CU), each. The CDNA2 compute unit is capable of full-rate FP64, packed FP32 math, and Matrix Engines V2 (fixed function hardware for matrix multiplication, accelerating DNN building, training, and AI inference). With 128 CUs per chiplet, assuming the CDNA2 CU has 64 stream processors, one arrives at 8,192 SP. Two such dies add up to a whopping 16,384, more than three times that of the "Navi 21" RDNA2 silicon. Each die further features its independent PCIe interface, and XGMI (AMD's rival to CXL), an interconnect designed for high-density HPC scenarios. A rudimentary VCN (Video CoreNext) component is also present. It's important to note here, that the CDNA2 CU, as well as the "Aldebaran" MCM itself, doesn't have a dual-use as a GPU, since it lacks much of the hardware needed for graphics processing. The MI200 is expected to launch later this year.

xGMI (inter-chip global memory interconnect) is a cable-capable version of AMD's Infinity Fabric interconnect. A line of code in the latest version of AMDGPU Linux drivers reveals that "Vega 20" will support xGMI. This line tells the driver to check the state of xGMI link. A practical implementation of this could be inter-card high-bandwidth bridge connectivity that would otherwise saturate the PCI-Express host bus; similar to NVIDIA's usage of the new NVLink bridge for Quadro and Tesla products based on its "Volta" and "Turing" GPU architectures.

By no means should xGMI and NVLink implementations be interpreted as a coming back of multi-GPU to the gaming space. There are still no takers for DirectX 12 multi-GPU, and fewer AAA games support SLI or CrossFire. Even at higher resolutions/refresh-rates, existing SLI/CrossFire physical-layer standards have sufficient bandwidth for multi-GPU. The upcoming GeForce RTX 2000 graphics cards feature a new multi-GPU connector that's physically NVLink, but this is probably an attempt by NVIDIA to discard the legacy SLI bus and minimize redundant interfaces on its silicon. The TU102 and TU104 chips are implemented in the enterprise segment with the Quadro RTX family. The main application of xGMI/NVLink is to make multi-GPU hardware setups abstract to deep-learning software, so hardware can scale in the background with memory access spanning multiple GPUs. "Vega 20" will be launched in Radeon Pro and Radeon Instinct avatars late-2018.