The 56th edition of the TOP500 saw the Japanese Fugaku supercomputer solidify its number one status in a list that reflects a flattening performance growth curve. Although two new systems managed to make it into the top 10, the full list recorded the smallest number of new entries since the project began in 1993.

The entry level to the list moved up to 1.32 petaflops on the High Performance Linpack (HPL) benchmark, a small increase from 1.23 petaflops recorded in the June 2020 rankings. In a similar vein, the aggregate performance of all 500 systems grew from 2.22 exaflops in June to just 2.43 exaflops on the latest list. Likewise, average concurrency per system barely increased at all, growing from 145,363 cores six months ago to 145,465 cores in the current list.

Intel's Xeon Phi lineup, which started as Larrabee. has never seen any commercial success in the market despite big promises from the big blue giant that its programming model would be more productive for developers coming from x86. In the meantime, NVIDIA GPUs have taken over the world of supercomputing, with the latest generation Volta decimating Intel Xeon Phi offerings.

Intel's plan was to release a new generation of Xeon Phi called "Knights Hill", on a 10 nanometer process. However, constant delays ramping up 10 nm, paired with generally low demand for Xeon Phi, forced the company to abandon this project. Now the company announces that they are stopping production for eight currently shipping Xeon Phi models.

A few months ago we reported that Raja Koduri has left AMD to work at Intel on their new discrete GPU project. Looks like he's building a strong team, with the most recent addition being Tom Forsyth who is the father of Larrabee, which was Intel's first attempt at making an x86-based graphics processor. While Larrabee did not achieve its goal and is considered a failure by many, it brought some interesting improvements to the world, for example AVX512, and is now sold under the Xeon Phi brand.

Tom, who has previously worked at Oculus, Valve, and 3DLabs posted on Twitter that he's joining Intel in Raja's group, but he's "Not entirely sure what he'll be working on just yet." At Oculus and Valve he worked on Virtual Reality projects, for example he wrote big chunks of the Team Fortress 2 VR support for the Oculus Rift. Taking a look at Tom's papers suggests that he might join the Intel team as lead for VR-related projects, as that's without a doubt one of Raja's favorite topics to talk about.

Intel hired Raja Koduri, who resigned as head of AMD's Radeon Technologies Group (RTG), earlier this week. Koduri has been made Senior Vice President and Chief Architect of Intel's future discrete GPUs. That's right, Intel has renewed its dreams to power high-end graphics cards that compete with AMD and NVIDIA. Intel's last attempt at a discrete GPU was "Larrabee," which evolved into a super-scalar multi-core processor for HPC applications under the Xeon Phi line.

This development heralds two major theories. One, that Intel's collaboration with AMD RTG on graphics IP could only go further from here, and what is a multi-chip module of Intel and AMD IP now, could in the future become a true heterogeneous die of Intel's and AMD's IP. Two, that the consolidation of AMD's graphics assets and IP into a monolithic entity as RTG, could make it easier to sell it lock, stock, and barrel, possibly to Intel.

Intel's next-generation "Cannon Lake" CPU micro-architecture could see the introduction of the AVX-512 instruction-set to the mainstream segments (MSDT or mainstream-desktop, and mobile). It is currently available on the company's Core X "Skylake-X" HEDT processors, and on the company's Xeon "Skylake-W," Xeon Scalable "Skylake-SP," and in a limited form on the Xeon Phi Knights Landing and Knights Mill scalar compute chips.

The upcoming "Cannon Lake" mainstream silicon will feature AVX512F, AVX512CD, AVX512DQ, AVX512BW, and AVX512VL instructions, and will support AVX512_IFMA and AVX512_VBMI commands, making it a slightly broader implementation of AVX-512 than the "Skylake-SP" silicon. The new AVX-512 will vastly improve performance of compute-intensive applications that take advantage of it. It will also be a key component of future security standards.

Intel Corporation today announced a range of new products, technologies and investments from the edge to the data center to help expand and accelerate the growth of artificial intelligence (AI). Intel sees AI transforming the way businesses operate and how people engage with the world. Intel is assembling the broadest set of technology options to drive AI capabilities in everything from smart factories and drones to sports, fraud detection and autonomous cars.

At an industry gathering led by Intel CEO Brian Krzanich, Intel shared how both the promise and complexities of AI require an extensive set of leading technologies to choose from and an ecosystem that can scale beyond early adopters. As algorithms become complex and required data sets grow, Krzanich said Intel has the assets and know-how required to drive this computing transformation. In a blog Krzanich said: "Intel is uniquely capable of enabling and accelerating the promise of AI. Intel is committed to AI and is making major investments in technology and developer resources to advance AI for business and society."

TYAN, an industry-leading server platform design manufacturer and subsidiary of MiTAC Computing Technology Corporation, is showcasing a wide range of HPC server platforms optimized for enterprise, storage and data center applications at SC16 this week in Salt Lake City's Salt Palace Convention Center.

TYAN's comprehensive HPC platforms span a wide range of hardware specifications. The Intel Xeon E7-based, 4U quad-socket FT76-B7922 offers a memory capacity of 6TB and supports up to 4x Intel Xeon Phi coprocessors for the most demanding HPC users; the Intel Xeon E5-based, 4U dual-socket FT77C-B7079 supports up to 8x Intel Xeon Phi coprocessors for highly parallelized application deployment, the 2U dual-socket TA80-B7071 supports up to 4x Intel Xeon Phi coprocessors for large-scale production deployment in various high performance computing segments; and the 1U dual-socket GA80-B7081 supports up to 3x Intel Xeon Phi coprocessors for ISVs, universities, and small businesses looking for parallelized application development or proof of concept solution deployment.

NVIDIA accused Intel of cheating in its ISC 2016 presentation, particularly in a performance-related slide, in which it claimed that its "Knights Landing" Xeon Phi HPC processor provides faster training of neural nets than NVIDIA "Maxwell" GPUs. In a slide, Intel claimed that a Xeon Phi HPC processor card is 2.3 times faster at training deep-learning neural nets, and 38 percent better scaling across nodes, than NVIDIA "Maxwell" GPUs, which triggered a swift response from the GPU maker, which made significant investments in deep-learning technologies over the past three years.

NVIDIA argued that Intel is using the classic technique of running outdated benchmarks to test its neural net training speeds. The company says that if Intel used the latest version of the same benchmark (Caffe AlexNet), the "Maxwell" GPU will be found to be 30 percent faster than the Xeon Phi at training neural nets. NVIDIA also notes that "Maxwell" is only its previous-generation part, and a "Pascal" based HPC processor would easily be 90 percent faster than the Xeon Phi. More importantly, NVIDIA notes that Intel compared 32 of its new Xeon Phi servers against four-year-old Nvidia Kepler K20 servers being used in ORNL's Titan supercomputer. The latest "Pascal" GPUs leverate NVLink to scale up to 128 GPUs, providing the fastest deep-learning solutions money can buy.

Noctua unveiled a prototype fin-stack heatsink for very large CPU socket types, such as Intel Socket P (LGA3647) and AMD SP3, powering chips such as Intel Xeon Phi "Knights Landing," and upcoming AMD Opteron SP3 32-core SoCs. There will be 3U and 4U versions of this heatsink, supporting NF-A9 (92 mm) and NF-F12 (120 mm) fans. The heatsink is just a very large aluminium fin-stack, to which heat drawn from the base is fed by seven 8 mm thick nickel-plated copper heat pipes.

Intel Corporation todayannounced several new and enhanced technologies bolstering its leadership in high-performance computing (HPC). These include disclosure of the future generation Intel Xeon Phi processor, code-named Knights Hill, and new architectural and performance details for Intel Omni-Path Architecture, a new high-speed interconnect technology optimized for HPC deployments.

Intel also announced new software releases and collaborative efforts designed to make it easier for the HPC community to extract the full performance potential from current and future Intel industry-standard hardware. Together, these new HPC building blocks and industry collaborations will help to address the dual challenges of extreme scalability and mainstream use of HPC while providing the foundation for a cost-effective path to exascale computing.

Puget Systems has been providing quad socket workstations for years now. Today, we refresh that product with a new duo of quad socket workstations that offer even more capacity, better cooling, and quieter operation. The new Peak Quad CPU workstations come in both Intel and AMD varieties. Our intention with this refresh is to take some of the highest performance workstation configurations available today and make them something you can put in your lab or office. Most workstations and servers of this caliber come with a prohibitive noise level but the Peak line of workstations solves this problem while still providing excellent cooling and long component lifespan.

In addition to supporting four CPUs, these workstations also support other high performance options such as large SSD arrays and accelerator cards including Intel Xeon Phi and NVIDIA Tesla. Most importantly, we have designed these workstations to be flexible. With systems at this level, it is typical for us to plan, design, implement and test a custom solution for each customer and use case. If you are unsure whether Peak is right for you, just ask! We have dedicated staff on hand for HPC, parallel and cluster computing.

Micron Technology, Inc. (Nasdaq:MU), one of the world's leading providers of advanced semiconductor solutions, today announced an ongoing collaboration with Intel to deliver an on-package memory solution for Intel's next-generation Xeon Phi processor, codenamed Knights Landing. The memory solution is the result of a long-term effort between the two companies to break down the memory wall, leveraging the fundamental DRAM and stacking technologies also found in Micron's Hybrid Memory Cube products.

"The ecosystem is changing and the importance of scalable on-package memory and memory bandwidth is now coming to light," said Chirag Dekate, Research Manager at IDC. "Memory is at the heart of the solution space which will benefit both big compute and big data. This announcement is a clear validation of how Micron is advancing the role and impact of memory on systems and the value that 3D memory can deliver."

Intel Corporation today announced new details for its next-generation Intel Xeon Phi processors, code-named Knights Landing, which promise to extend the benefits of code modernization investments being made for current generation products. These include a new high-speed fabric that will be integrated on-package and high-bandwidth, on-package memory that combined, promise to accelerate the rate of scientific discovery. Currently memory and fabrics are available as discrete components in servers limiting the performance and density of supercomputers.

The new interconnect technology, called Intel Omni Scale Fabric, is designed to address the requirements of the next generations of high-performance computing (HPC). Intel Omni Scale Fabric will be integrated in the next generation of Intel Xeon Phi processors as well as future general-purpose Intel Xeon processors. This integration along with the fabric's HPC-optimized architecture is designed to address the performance, scalability, reliability, power and density requirements of future HPC deployments. It is designed to balance price and performance for entry-level through extreme-scale deployments.

The National Cheng Kung University (NCKU) Supercomputing Research Center (RSC) has built the world's first switchless cluster computer. Known as the "CK-Star", this computer connects eight computers without switch control, thus breaking Intel's performance record. Together with the computer systems provided by Acer, the CK-Star is jointly built by NCKU RSC Director Dr. Chi-Chuan Hwang and Dr. Yuefan Deng of Mainland China's National Supercomputing Center in Jinan (NSCCJN), who is also a Distinguished Professor at the State University of New York (SUNY).

NCKU RSC Director Dr. Chi-Chuan Hwang added that CK-Star is the most unique switchless cluster supercomputer compared to traditional cluster supercomputer which requires switch control to control interaction between nodes. He explained that the weakness of the traditional one is that switches will become performance bottlenecks when the number of nodes is large. Besides, switches also consume large amount of power, estimated to be 50% of the total power consumption. With the introduction of the CK-Star which allows the unrestricted expansion of supercomputers, these problems can be overcome.

Intel Corporation unveiled innovations in HPC and announced new software tools that will help propel businesses and researchers to generate greater insights from their data and solve their most vital business and scientific challenges.

"In the last decade, the high-performance computing community has created a vision of a parallel universe where the most vexing problems of society, industry, government and research are solved through modernized applications," said Raj Hazra, Intel vice president and general manager of the Technical Computing Group. "Intel technology has helped HPC evolve from a technology reserved for an elite few to an essential and broadly available tool for discovery. The solutions we enable for ecosystem partners for the second half of this decade will drive the next level of insight from HPC. Innovations will include scale through standards, performance through application modernization, efficiency through integration and innovation through customized solutions."

Global supercomputer leader Cray Inc. today announced the Company has broadened its support for accelerators and coprocessors, and is now selling the Cray XC30 series of supercomputers with NVIDIA Tesla K20X GPU accelerators and Intel Xeon Phi coprocessors. This marks the latest step in Cray's Adaptive Supercomputing vision, which is focused on delivering innovative systems that integrate diverse technologies like multi-core and many-core processing into a unified architecture.

"Our first experience with climate and materials science applications showed that replacing one of the multi-core processors in the XC30 with an NVIDIA Tesla GPU boosts application performance and disproportionally reduced energy to solution," said Thomas Schulthess, professor at ETH Zurich and director of the Swiss National Supercomputing Center, which was one of the first Cray customers to order a hybrid Cray XC30 system. "This provides necessary proof of principle in favor of hybrid compute nodes as a promising solution to the energy challenges we face in supercomputing."

A system built with thousands of Intel processors and co-processors was just named the most powerful supercomputer in the world in the 41st edition of the Top500 list of supercomputers. The system, known as "Milky Way 2," includes 48,000 Intel Xeon Phi coprocessors and 32,000 Intel Xeon processors and operates at a peak performance of 54.9 PFlops (54.9 quadrillion floating point operations per second) -- more than twice the performance of the top rated system from the last edition of the Top500 list in November 2012. This is the first exclusively Intel-based system to take the top spot on the list since 1997.

Intel also announced the expansion of the Intel Xeon Phi coprocessors portfolio and revealed details of the second generation of Intel Xeon Phi products code named "Knights Landing." The new products and technologies will continue to radically increase the energy efficiency and performance of supercomputers worldwide.

Intel has announced the production release of the Intel SDK for Open CL Applications XE 2013 that launched as a beta program in December. The new SDK broadens options for developers on Intel architecture and includes tools, optimization guides and training.

The SDK helps OpenCL developers improve performance and efficiency on Intel Xeon Phi coprocessors and Intel Xeon processors as well as create highly parallel applications for high performance computing workstations, data analytics and other uses. Download the Intel SDK for OpenCL Applications XE 2013 here.

TYAN, an industry-leading server platform design manufacturer and subsidiary of MiTAC International Corp, launched the TYAN TA77-B7061, its latest and flexible 2U GPU supported platform; the S7042, entry-level dual socket motherboard; GT62A-B5512 and the GT20A-B7040, the cost-effective 1U server during the CeBIT. TYAN welcomes customers to visit the TYAN website for more detail product information during CeBIT or experience the latest products at ISS EMEA in Dublin, Ireland from April, 10-12.

TYAN TA77-B7061 is the ideal platform designed for users who are looking for accelerated data-processing and efficient computing performance. Supporting up to four GPUs in a 2U server chassis, it is a high performance option that also offers outstanding computing density, saving both time and server/rack space in conjunction with industry-leading companies' GPU products such as Intel Xeon Phi processors, NVIDIA Tesla K20 Series and ATI FirePro. The non-compromised TA77-B7061 will be displayed at TYAN booth at ISS EMEA (Intel Solution Summit) in Dublin, Ireland from April, 10-12. TYAN TA77-B7061 supports (2) Intel Xeon E5-2600 Series Processors, (8+8) DDR-III R/U/LR-DIMM, (4) PCI-E x16 G3 slots, (1) PCI-E x8 G3 slots, (2) GbE ports and (8) 2.5" HDDs. Customers could enjoy more flexible and upgradeable computing performance to tailor to their own computing environment with TYAN's TA77-B7061 server platform.

GIGABYTE is proud to announce two new models of workstation motherboards and one new model dedicated to mission critical server applications. All of them being based on the Intel Xeon processors E5-2600 product family, these new models are designed to answer demanding needs for computing resources across various usage models, form factors and scales. While these products have been naturally thought for scenarios requiring heavy computing power through GPUs or GPGPU / co-processors cards, from CAD/CAE to rendering, simulation and modeling, their most notable advantage relies in their unique memory performance capability. GIGABYTE motherboards support DDR3-1600 MHz speeds with 16 GB 1.35V RDIMMs.

Achieved through GIGABYTE's capabilities in design, PCB layout and BIOS fine-tuning, this feature will be most appreciated in the many workstation applications where improvements in memory frequency result in speeding up the user's productivity and in all the industries relying on server applications where each incremental improvement in memory performance results in significant benefits, such as in finance.

Intel Corporation today announced that its board of directors promoted five corporate officers and elected three new corporate vice presidents. William M. Holt, 60, was elevated from senior vice president to executive vice president. He is general manager of the Technology and Manufacturing Group and jointly oversees all technology development and manufacturing activities across the company. Holt joined Intel in 1974, was named a senior vice president in 2006, and is based in Hillsboro, Ore.

Thomas M. Kilroy, 55, was promoted from senior vice president to executive vice president. He is general manager of Intel's Sales and Marketing Group and is responsible for all of the company's sales and marketing efforts worldwide. Kilroy joined Intel in 1990, was named a senior vice president in 2010, and is based in Hillsboro, Ore.

ASUS servers have proven their capabilities as part of the MOGON supercomputer project, which was co-developed by ASUS and Megware for Johannes Gutenberg University Mainz and ranked 81 on the prestigious TOP500 supercomputer list in June 2012. ASUS now presents one of the world's first servers to support the Intel Xeon Phi 5110P coprocessor and NVIDIA next-gen Kepler-based Tesla K20/K20X GPUs, unveiled at the 2012 Supercomputing Conference, held November 10-16 in Salt Lake City, Utah.

The ASUS ESC4000 G2 Series provides up to 4TFLOPS peak computing power, delivering extreme hybrid performance as demanded by HPC customers. ASUS also offers ESC2000 G2 and ESC1000 G2 Series servers and workstations with ASUS SSD technology that accelerates storage by up to three times in workstation-related tasks.

HP today unveiled the industry's first server built to help clients operationalize Big Data, drive new business opportunities and save up to $1 million over three years.

With the advent of Big Data software and the promise that it brings, many organizations have tried to deploy these solutions on existing architectures not designed to handle the specific needs of these workloads. As a result, the outcomes from these early deployments have been suboptimal from a performance and cost perspective.

Super Micro Computer, Inc., a global leader in high-performance, high-efficiency server technology and green computing, has readied a wide selection of server platforms for Intel Xeon Phi coprocessors based on Intel Many Integrated Core (MIC) architecture in form-factors ranging from 1U-3U rack mount systems to 4U Tower servers.

Supermicro's 4-node FatTwin platform has a new model which supports up to 3 Intel Xeon Phi Coprocessor cards per U for a total of 12 coprocessors in 4U. With dual Intel Xeon processor E5-2600 and up to 512 GB of memory support per node this hybrid SuperServer offers an amazing amount of parallel processing power to accelerate research while simplifying development of highly-parallel applications. A key advantage of the FatTwin platform is its shared resource, power saving architecture with high-efficiency 8 cm heavy-duty cooling fans, optimized airflow and Platinum Level (94%+) power supplies, which combined provide up to 16% greater efficiency over similar server systems.

Marking a new era in high-performance computing, Intel Corporation introduced the Intel Xeon Phi coprocessor, a culmination of years of the research and collaboration, to bring unprecedented performance for innovative breakthroughs in manufacturing, life sciences, energy and other areas.

The ability to quickly compute, simulate and make more informed decisions has propelled the growth of high performance computing (HPC) and analytics. This has been driven by global business and research priorities to more accurately predict weather patterns, create more efficient energy resources, and develop cures for diseases among many other pressing issues. With the breakthrough performance per watt and other new attributes of Intel Xeon Phi coprocessor, the industry will have even greater reliability in generating accurate answers, help proliferate high-performance computing beyond laboratories and universities and achieve maximum productivity.